EPC635 datasheet(81/97 Pages) EPC

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DLL_fine_ctrl_ext_lo

DLL manual control: External fine control (low)

0x72

Bit No.

Bit name

DLL_fine_ctrl_ext[7:0]

Operation

Default

0x00

DLL_fine_ctrl_ext:

Fine control from user. Valid only when DLL_control.dll_ctrl_ext = 1 (see section 8.7.19., DLL_control)

8.6.9. DLL_coarse_ctrl_ext

DLL_coarse_ctrl_ext

DLL manual control: External coarse control

0x73

Bit No.

Bit name

reserved

dll_coarse_ctrl_ext

Operation

Default

0x00

dll_coarse_ctrl_ext:

Coarse control from user. Valid only when DLL_control.dll_ctrl_ext = 1 (see section 8.7.19., DLL_control)

8.6.10. CFG_Mode_

CFG_Mode_Control

Configuration mode: Control register

0x7D

Bit No.

Bit name

reserved

sys_clk

_bypass

pll_bypass

pll_en

reserved

Operation

Default

0x04 (Note 1)

sys_clk_bypass:

Bypass OSC clock directly to the sys_clk output

0: normal

1: bypass (sys_clk = osc_clk)

pll_bypass:

Bypass OSC clock directly to the PLL output as clock source to the CGU

0: normal

1: bypass (pll_clk = osc_clk)

pll_en:

Enable PLL block

0: disable

1: enable

Note 1:

Default (reset) value is internally modified during start-up sequence. Therefore, when this register is read via I2C, a different

value will be observed.

Characteristics subject to change without notice

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Datasheet_epc635-V1.02

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