CS6420-CS datasheet(41/52 Pages) CIRRUS

41 / 52 page

CDB6420

DS205DB1

HARDWARE

Power Supplies

The CDB6420 power supply circuitry is shown in

Figure 1. The evaluation board expects a clean

+5V DC power supply to be applied to the +5VA

binding post. This powers the analog components

of the evaluation board. Power for the digital com-

ponents is derived through a ferrite bead to filter

out the high frequency components.

Analog Signal Connections

Figure 2 shows the RCA connectors for the analog

signals. These RCA connectors connect directly to

the test points with the same names. All the con-

nectors have a nominal maximum input and output

voltage of 2.8 Vpp. NO and AO present 12 kΩ of

output impedance at the connector and have a low-

pass corner at 4 kHz. APO_IN and NI both have

input anti-aliasing filters with corners at 8 kHz, and

an nominal input impedance of 6 k

Ω.

Microphone Bias

A constant current source providing the necessary

bias for electret microphones is shown in Figure 3.

A 1/8" stereo microphone jack (J8) is provided for

easy connection to microphones with 1/8" plugs.

HDR3 provides an easy way to connect a micro-

phone with bare wires. The stereo microphone jack

is self-shorting, so when connecting to the test

point MICIN or HDR4, make sure that either a plug

is in the jack, or the trace from the jack has been cut

(HDR4 is a convenient place to do this).

Speaker Driver

A speaker driver circuit, implemented with a Mo-

torola MC34119, is shown in Figure 4. This circuit

provides 6.4 Vpp differentially to the SPEAKER

terminals (J1 and J2). This circuit can drive down

to an 8

Ω load. When using the speaker driver, the

speaker driver must be connected to AO by HDR3.

This will connect the speaker driver to AO, but in

doing so will create a voltage divider at the AO test

point resulting in a 1.4 Vpp full-scale swing at the

AO test point and connector. The CDB6420 is

shipped with the speaker driver enabled by default.

In order to disable the speaker driver, remove the

jumper shorting HDR3. This will result in the con-

nection between AO and the speaker driver input

being broken and allowing the signal at the AO test

point and connector to swing to its full extreme of

2.8 Vpp full-scale.

CS6420

The heart of the CDB6420, the CS6420 Full-Du-

plex Speakerphone Chip, is shown in Figure 5. The

outputs AO and NO are shown with the output low-

pass filters that remove the high frequency compo-

nents from the delta-sigma DACs.

The inputs

APO_IN and NI are shown with the anti-aliasing

network they require.

When using APO as the input, the CS6420 does not

use the on-chip 34 dB preamplifier. HDR1 must be

changed to the PREAMP OFF (1-2) position when

Figure 1. Power Supply

Figure 2. RCA Connections

CS6420-CS датащи(PDF) 41 Page - Cirrus Logic

CS6420-CS датащи(HTML) 41 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

датащи скачать

ссылки URL