L99MM70XP datasheet(19/68 Pages) STMICROELECTRONICS

19 / 68 page

L99MM70XP

Description

Doc ID 022637 Rev 2

19/68

If NRES is pulled low, all control registers (except the reset level bit RSTLVL) and the

configuration register are set to default. In both cases, the device enters passive mode.

3.9

VCC fail

The VCC regulator output voltage is monitored.

In case of a drop below the VCC fail threshold (VCC < 2 V typ. for t > 2 µs), the VCC fail bit is

latched. The fail bit is cleared by a dedicated SPI command.

If 4 ms after turn on of the regulator the VCC voltage is below the VCC fail threshold, the

L99MM70XP identifies a short circuit condition at the regulator output and switch it off.

In case of VCC short to GND failure the device enters VBAT-standby mode automatically.

3.10

Output drivers OUT1 … OUT9

3.10.1

Load condition

Each half bridge is built by internally connected high-side and low-side power DMOS

transistors. Due to the built-in reverse diodes of the output transistors, inductive loads can

be driven at the outputs OUT1 to OUT5 without external free-wheeling diodes. The drivers

OUT6, OUT7, OUT8, OUT9, ECV and ECFD are intended to drive resistive loads. Therefore

only a limited energy (E < 1 mJ) can be dissipated by the internal ESD-diodes in

freewheeling condition. For inductive loads (L > 100 µH) an external free wheeling diode

connected between GND and the corresponding output is required.

3.10.2

Current monitor

The current monitor output sources a current image at the current monitor output, which has

two fixed ratios of the instantaneous current of the selected high-side driver. Outputs with a

resistance of 500 m

 and higher have a ratio of 1/2000 and those with a lower resistance of

1/10000. The signal at output CM is blanked after switching on the driver until correct

settlement of the circuitry (at least for 32 µs). The bits 0 to 3 of the control register 3 define

which of the outputs are multiplexed to the current monitor output CM. The current monitor

output allows a more precise analysis of the actual state of the load rather than the detection

of an open-load or overload condition. For example, it can be used to detect the motor state

(starting, free running, stalled). Moreover, it is possible to control the power of the defroster

more precisely by measuring the load current.

3.10.3

PWM inputs

Each driver has a corresponding PWM enable bit, which can be programmed by the SPI

interface. If the PWM enable bit is set in control register 2 or 3, the output is controlled by the

logically AND-combination of the PWM signal and the output control bit in control register 0

or 1. The outputs OUT1-5, 7, 9, ECV are controlled by the PWM1 input, the output OUT6 is

controlled by the input PMW2 and output OUT8 is controlled by INH/PWM3. Thus, the three

PWM inputs can be used to dim three lamps independently by external PWM signals.

Switching off the outputs, a delay of maximum 300 µs is introduced (see also Table 18 in

Section 8.9.2: Switching times), hence the off time of the PWM input signal should be at

least 300 µs.

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