LM2759SDEV datasheet(4/22 Pages) TI1

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LM2759

SNVS577D – JUNE 2008 – REVISED MAY 2013

www.ti.com

Electrical Characteristics

(1) (2)

Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the full operating junction temperature range

(-30°C

≤ TJ ≤ +125 °C). Unless otherwise noted, specifications apply to the LM2759 Typical Application Circuit (pg.1) with VIN

= 3.6V, VTX = 0V, VSTROBE = 0V, CIN = C1 = C2 = 2.2 µF, COUT = 4.7 µF.

(3)

Symbol

Parameter

Conditions

Min

Typ

Max

Units

ILED

LED Current Sink Accuracy

Flash Mode

198

220

242

ADDR xB0 = 0x02

−10%

+10%

IFLASH

Max Flash Output Current

Flash Mode

ADDR xB0 = 0x0F

VGDX

Gain Transition Voltage

ILED = 500mA

350

Threshold on ISINK

(VISINK falling)

VOUT

Output Voltage

1x Mode, IOUT = 0 mA (VIN >VOUT)

(4)

4.7

4.9

1.5x Mode, IOUT = 0 mA

4.7

4.9

2x Mode, IOUT = 0 mA

5.1

5.4

ROUT

x1 Mode Output Impedance

IOUT = 200mA, VIN = 3.3V

0.33

Ω

1.5x Mode Output

IOUT = 500mA, VIN = 3.3V

1.9

Impedance

x2 Mode Output Impedance

2.25

FSW

Switching Frequency

2.7V

≤ VIN ≤ 5.5V

0.7

1.3

MHz

VIH

Input Logic High

Pins: TX, Strobe

1.26

VIL

Input Logic Low

Pins: TX, Strobe

0.7

IOUT = 0 mA, 1x Mode

0.6

0.9

Quiescent Current

IOUT = 0 mA, 1.5x Mode

3.4

4.0

IOUT = 0 mA, 2x Mode

5.9

7.0

ISD

Shutdown Current

Device Disabled

5.8

9.7

µA

2.7V

≤ VIN ≤ 5.5V

I2C Compatible Interface Voltage Specifications (SCL, SDA)

VIL

Input Logic Low “0”

2.7V

≤ VIN ≤ 5.5V

0.72

VIH

Input Logic High “1'

2.7V

≤ VIN ≤ 5.5V

1.25

VOL

Output Logic Low “0”

ILOAD = 3 mA

300

I2C Compatible Interface Timing Voltage Specifications (SCL, SDA)(5)

SCL (Clock Period)

2.5

µs

Data in Setup Time to SCL

100

High

Data Out Stable After SCL

Low

SDA Low Setup Time to

100

SCL Low (Start)

SDA High Hold Time After

100

SCL High (Stop)

(1)

All voltages are with respect to the potential to the GND pin.

(2)

Min and Max limits are specified by design, test, or statistical analysis. Typical (Typ) numbers are not ensured, but do represent the

most likely norm. Unless otherwise specified, conditions for Typ specifications are: VIN = 3.6V and TA = 25°C.

(3)

CIN, COUT, C1, C2: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.

(4)

For input voltage below the regulation target during the gain of 1x, the output voltage will typically be equal to the input voltage.

(5)

SCL and SDA should be glitch-free in order for proper brightness control to be realized.

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