 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
PC87364-XXX/VLA датащи(PDF) 62 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
PC87364-XXX/VLA датащи(HTML) 62 Page - National Semiconductor (TI) |
|
|
62 / 180 page  2.0 Device Architecture and Configuration (Continued) 62 www.national.com 2.14 SYSTEM WAKE-UP CONTROL (SWC) CONFIGURATION 2.14.1 Logical Device 4 (SWC) Configuration Table 24 lists the configuration registers which affect the SWC. See Sections 2.2.3 and 2.2.4 for a detailed description of these registers. Table 24. System Wake-Up Control (SWC) Configuration Registers Index Configuration Register or Action Type Reset 30h Activate. When bit 0 is cleared, the registers of this logical device are not accessible. Note 1. Note 1. The logical device registers are maintained, and all wake-up detection mechanisms are func- tional. R/W 00h 60h Base Address MSB register R/W 00h 61h Base Address LSB register. Bits 4-0 (for A4-0) are read only, 00000b. R/W 00h 70h Interrupt Number R/W 00h 71h Interrupt Type. Bit 1 is read/write. Other bits are read only. R/W 03h 74h Report no DMA assignment RO 04h 75h Report no DMA assignment RO 04h |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
