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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PC87360 датащи(PDF) 77 Page - National Semiconductor (TI) |
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PC87360 датащи(HTML) 77 Page - National Semiconductor (TI) |
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77 / 168 page  3.0 System Wake-Up Control (SWC) (Continued) 77 www.national.com Table 35. Bank 1 - CEIR Wake-Up Configuration and Control Register Map Table 36. Bank 2 - Event Routing Configuration Register Map Table 37. Bank 3 - Standby GPIO Pin Configuration Register Map Offset Mnemonic Register Name Type Section 13h IRWCR CEIR Wake-Up Control R/W 3.4.20 14h Reserved 15h IRWAD CEIR Wake-Up Address R/W 3.4.21 16h IRWAM CEIR Wake-Up Address Mask R/W 3.4.22 17h ADSR CEIR Address Shift R/O 3.4.23 18h IRWTR0L CEIR Wake-Up, Range 0, Low Limit R/W 3.4.24 19h IRWTR0H CEIR Wake-Up, Range 0, High Limit R/W 3.4.24 1Ah IRWTR1L CEIR Wake-Up, Range 1, Low Limit R/W 3.4.25 1Bh IRWTR1H CEIR Wake-Up, Range 1, High Limit R/W 3.4.25 1Ch IRWTR2L CEIR Wake-Up, Range 2, Low Limit R/W 3.4.26 1Dh IRWTR2H CEIR Wake-Up, Range 2, High Limit R/W 3.4.26 1Eh IRWTR3L CEIR Wake-Up, Range 3, Low Limit R/W 3.4.27 1Fh IRWTR3H CEIR Wake-Up, Range 3, High Limit R/W 3.4.27 Offset Mnemonic Register Name Type Section 13h WK_SMIEN0 Wake-Up SMI Enable 0 R/W 3.4.7 14h WK_SMIEN1 Wake-Up SMI Enable 1 R/W 3.4.8 15h WK_IRQEN0 Wake-Up Interrupt Request Enable 0 R/W 3.4.9 16h WK_IRQEN1 Wake-Up Interrupt Request Enable 1 R/W 3.4.10 17h WK_X1EN0 Wake-Up Extension 1 Enable 0 R/W 3.4.11 18h WK_X1EN1 Wake-Up Extension 1 Enable 1 R/W 3.4.12 19h WK_X2EN0 Wake-Up Extension 2 Enable 0 R/W 3.4.13 1Ah WK_X2EN1 Wake-Up Extension 2 Enable 1 R/W 3.4.14 1Bh-1Fh Reserved Offset Mnemonic Register Name Type Section 13h SBGPSEL Standby GPIO Pin Select R/W 3.4.29 14h SBGPCFG Standby GPIO Pin Configuration R/W 3.4.30 15h-1Fh Reserved |
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