STM32L151X8 datasheet(126/133 Pages) STMICROELECTRONICS

126 / 133 page

Revision history

STM32L151x6/8/B STM32L152x6/8/B

126/133

DocID17659 Rev 12

Revision history

Table 73. Document revision history

Date

Revision

Changes

02-Jul-2010

Initial release.

01-Oct-2010

Removed 5 V tolerance (FT) from PA3, PB0 and PC3 in Table 8:

STM32L15xx6/8/B pin definitions

Updated Table 14: Embedded reset and power control block

characteristics

Updated Table 16: Embedded internal reference voltage

Added Table 53: ADC clock frequency

Updated Table 54: ADC characteristics

16-Dec-2010

Modified consumptions on page 1 and in Section 3.1: Low power

modes

LED_SEG8 removed on PB6.

Updated Section 6: Electrical characteristics

VFQFPN48 replaced by UFQFPN48

25-Feb-2011

Section 3.3.2: Power supply supervisor: updated note.

Table 8: STM32L15xx6/8/B pin definitions: modified main function

(after reset) and alternate function for OSC_IN and OSC_OUT pins;

modified footnote 5; added footnote to OSC32_IN and OSC32_OUT

pins; C1 and D1 removed on PD0 and PD1 pins (TFBGA64

column).

Section 3.11: DAC (digital-to-analog converter): updated bullet list.

Table 10: Voltage characteristics on page 52: updated footnote 3

regarding IINJ(PIN).

Table 11: Current characteristics on page 52: updated footnote 4

regarding positive and negative injection.

Table 14: Embedded reset and power control block characteristics

on page 54: updated typ and max values for TRSTTEMPO (VDD

rising, BOR enabled).

Table 17: Current consumption in Run mode, code with data

processing running from Flash on page 58: removed values for HSI

clock source (16 MHz), Range 3.

Table 18: Current consumption in Run mode, code with data

processing running from RAM on page 59: removed values for HSI

clock source (16 MHz), Range 3.

Table 19: Current consumption in Sleep mode on page 60 removed

values for HSI clock source (16 MHz), Range 3 for both RAM and

Flash; changed units.

Table 20: Current consumption in Low power run mode on page 62:

updated parameter and max value of IDD Max (LP Run).

Table 21: Current consumption in Low power sleep mode on

page 63: updated symbol, parameter, and max value of IDD Max (LP

Sleep).

Table 22: Typical and maximum current consumptions in Stop mode

on page 64 updated values for IDD (Stop with RTC) - RTC clocked by

LSE external clock (32.768 kHz), regulator in LP mode, HSI and

HSE OFF (no independent watchdog).

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