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STM32L151x8 датащи(PDF) 81 Page - STMicroelectronics |
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STM32L151x8 датащи(HTML) 81 Page - STMicroelectronics |
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81 / 133 page ![]() DocID17659 Rev 12 81/133 STM32L151x6/8/B STM32L152x6/8/B Electrical characteristics 104 Static latch-up Two complementary static tests are required on six parts to assess the latch-up performance: • A supply overvoltage is applied to each power supply pin • A current injection is applied to each input, output and configurable I/O pin These tests are compliant with EIA/JESD 78A IC latch-up standard. 6.3.12 I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below VSS or above VDD (for standard pins) should be avoided during normal product operation. However, in order to give an indication of the robustness of the microcontroller in cases when abnormal injection accidentally happens, susceptibility tests are performed on a sample basis during device characterization. Functional susceptibility to I/O current injection While a simple application is executed on the device, the device is stressed by injecting current into the I/O pins programmed in floating input mode. While current is injected into the I/O pin, one at a time, the device is checked for functional failures. The failure is indicated by an out of range parameter: ADC error, out of spec current injection on adjacent pins or other functional failure (for example reset, oscillator frequency deviation, LCD levels, etc.). The test results are given in Table 41. Note: It is recommended to add a Schottky diode (pin to ground) to analog pins which may potentially inject negative currents. Table 40. Electrical sensitivities Symbol Parameter Conditions Class LU Static latch-up class TA = +105 °C conforming to JESD78A II level A Table 41. I/O current injection susceptibility Symbol Description Functional susceptibility Unit Negative injection Positive injection IINJ Injected current on all 5 V tolerant (FT) pins -5 +0 mA Injected current on any other pin -5 +5 |
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