MICRF007

Micrel

MICRF007

10

December 2000

to Internal

Circuits

VDDBB

VSSBB

SHUT

Q2

Q3

Q1

VSSBB

Figure 6. SHUT

Control input circuitry is shown in Figure 6. The standard input

is a logic inverter constructed with minimum geometry

MOSFETs (Q2, Q3). P-channel MOSFET Q1 is a large

channel length device which functions essentially as a “weak”

pullup to VDD. Typical pullup current is 5

µA, leading to an

impedance to the VDD supply of typically 1M

Ω.

R2

10k

C3(CTH)

0.047

µF

C2

0.1

µF

C1

4.7

µF

C4

4.7

µF

Y1

6.7458MHz

REF.OSC.

GND

SHUT

GND

DO

GND

J2

J5

J4

C5

(Not Placed)

REFOSC

CAGC

SHUT

DO

VSS

ANT

VDDRF

CTH

+5V

GND

J3

J1

RF INPUT

Z1

Z3

Z4

Z2

R1

Squelch

Resistor

(Not Placed)

Figure 1. Test Circuit