LM9830 datasheet(5/45 Pages) NSC

5 / 45 page

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Parallel Port 8 Bit Data Read (Figure 3)

tAF-B3

AUTOFEED falling to BUSY rising

All Except Dataport

Dataport

1.5 tADC CLK

3 tADC CLK

ns (max)

tEPP ACCESS

D0-D7 valid before BUSY rising

(Note 14)

-5

ns (min)

tB-AF2

BUSY rising to AUTOFEED rising

ns (min)

tEPP HOLD

AUTOFEED rising to D0-D7 Tri-State

ns (min)

ns (max)

tAF-B4

AUTOFEED rising to BUSY falling

3 tMCLK

4 tMCLK

ns (max)

Nibble Data Read (Figure 4)

tAF-B3

AUTOFEED falling to BUSY rising

All Except Dataport

Dataport

1.5 tADC CLK

3 tADC CLK

ns (max)

tNIB ACCESS1

D4-D7 valid before BUSY rising

-20

ns (min)

tB-AF2

BUSY rising to AUTOFEED rising

ns (min)

tNIB ACCESS2

D0-D3 valid after AUTOFEED rising

ns (max)

tAF-B4

AUTOFEED rising edge to BUSY

falling

3 tMCLK

4 tMCLK

ns (max)

Microprocessor Mode (Figures 5, 6, and 7)

tALE SETUP

D0-D7 (Address) valid before ALE

falling

ns (min)

tALE HOLD

D0-D7 (Address) valid after ALE

falling

ns (min)

tALE

ALE high time

ns (min)

tALE-R/W

ALE falling to CS/RD/WR falling (next

operation)

ns (min)

tWR SETUP

D0-D7 valid before WR rising

ns (min)

tWR HOLD

D0-D7 valid after WR rising

ns (min)

tWR

WR pulse width

ns (min)

tRD ACCESS

RD low to D0-D7 valid

ns (max)

tRD TRI-STATE RD high to D0-D7 Tri-State

ns (max)

AC Electrical Characteristics

The following specifications apply for AGND=DGND=DGNDI/O=DGNDSRAM=0V, VA=VD=VDI/O=VSRAM=+5.0VDC,

fCRYSTAL IN= 50MHz, MCLK DIVIDER = 1.0 (unless otherwise noted), fMCLK = fCRYSTAL IN/MCLK DIVIDER, fADC CLK = fMCLK/8,

CL (databus loading) = 20pF/pin. Boldface limits apply for TA=TJ=TMIN to TMAX; all other limits TA=TJ=25°C. (Notes 7 & 8)

Symbol

Parameter

Conditions

Typical

(Note 9)

Limits

(Note 10)

Units

(Limits)

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