WM8753LEBSLASHRV datasheet(50/87 Pages) WOLFSON

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Advanced Information

WM8753L

AI Rev 3.1 June 2004

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

TSDIPOL

Controls polarity of thermal shutdown interrupts.

0 = Interrupt when thermal shutdown active.

1 = Interrupt when thermal shutdown inactive.

HPSWIPOL

Controls polarity of Headphone interrupts.

0 = Interrupt when headphone connected.

1 = Interrupt when headphone disconnected.

GPIO5IPOL

Controls polarity of GPIO5 interrupts.

0 = Interrupt when GPIO5 high.

1 = Interrupt when GPIO5 low.

GPIO4IPOL

Controls polarity of GPIO4 interrupts.

0 = Interrupt when GPIO4 high

1 = Interrupt when GPIO4 low

GPIO3IPOL

Controls polarity of GPIO3 interrupts.

0 = Interrupt when GPIO3 high

1 = Interrupt when GPIO3 low

MICDETPOL

Controls polarity of microphone bias detect

interrupt

0 = Interrupt when above threshold

1 = Interrupt when below threshold

R25 (19h)

Interrupt

Polarity

MICSHTPOL

Controls polarity of microphone bias short circuit

interrupts.

0 = Interrupt when bias over current

1 = Interrupt when bias normal

TSDIEN

Controls thermal shutdown interrupt.

1 = Enable interrupt.

0 = Disable interrupt.

HPSWIEN

Controls headphone interrupt.

1 = Enable interrupt.

0 = Disable interrupt.

GPIO5IEN

Controls GPIO5 interrupt.

1 = Enable interrupt.

0 = Disable interrupt.

GPIO4IEN

Controls GPIO4 interrupt.

1 = Enable interrupt.

0 = Disable interrupt.

GPIO3IEN

Controls GPIO3 interrupt.

1 = Enable interrupt.

0 = Disable interrupt.

MICDETEN

Controls Microphone Bias detect interrupt

1 = Enable interrupt.

0 = Disable interrupt.

R26 (1Ah)

Interrupt

Mask

MICSHTEN

Controls microphone bias short circuit interrupt

(button press).

1 = Enable interrupt.

0 = Disable interrupt.

R27 (1Bh)

Interrupt

Control

(1)

8:7

INTCON

Controls INT signal from controller.

00 = Disabled (no interrupts).

01 = Open drain active low INT signal.

10 = Active high INT signal.

11 = Active low INT signal.

Note that physical pin used for INT is controlled

via GPIO Control register.

Table 48 Interrupt Control

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