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Data Sheet

ADuCM350

Rev. A | Page 35 of 40

POWER MANAGEMENT AND CLOCKING

Power Modes

The PMU provides control of the ADuCM350 power modes

and allows the ARM Cortex-M3 to control the clocks and

power gating to reduce the dynamic power and hibernate

power.

There are four power modes available; each mode provides an

additional low power benefit with a corresponding reduction in

functionality.

• Active mode—all peripherals can be enabled. Active power is

managed by optimized clock management.

• Core sleep—the core is clock gated but the remainder of the

system is active. No instructions can be executed in this

mode, but DMA transfers can continue between peripherals

and memory.

• System sleep—in system sleep, most peripherals are clock

gated and are no longer user programmable; the interrupt

controller remains active and the NVIC processes wake-up

events for a limited number of sources.

• Hibernate mode—some limited state retention, limited

number of wake-up interrupts, and the RTC is active.

The device also has a backup mode that supplies minimum

power to the RTC and associated circuitry from a super

capacitor. The RTC can run for >12 hours with an 80 mF

capacitor.

Power Management

The ADuCM350 has an integrated power management system

to optimize performance and extend battery life of the device.

See the UG-587 hardware reference manual for additional

details.

The power management system consists of

• Integrated analog and digital LDOs regulated to 1.8 V.

• Hibernate mode from 2.0 V to 3.6 V.

• High performance AFE measurement from 2.5 V to 3.6 V.

• Integrated power switches for low standby current in

hibernate mode.

• Integrated smart diode trickle charger for a super capacitor

for use in backup mode.

• Dedicated VDDIO voltage via nine GPIO pins for peripheral

interoperability.

• Dedicated regulator for USB transceiver and bus supplied

from the VUSB pin.

• Dedicated supervisory circuits for fail safe operation,

including power supply monitors of DVDD during flash

read/writes, PSM of VCCM to monitor supply during AFE

measurements, and PSM on the LFXTAL block to monitor

the clock source for RTC.

Clocking

Two on-chip oscillators and driver circuitry for two external

crystals are available on the ADuCM350: LFOSC is a 32 kHz

internal oscillator, HFOSC is a 16 MHz internal oscillator, and

LFXTAL is a 32 kHz external crystal oscillator, and HFXTAL is

a 16 MHz external crystal oscillator.

The ADuCM350 supports either 8 MHz or 16 MHz resonant

circuits. The HF RC oscillator has an accuracy of ±5%. A low

jitter clock source is used for accurate AFE measurements.

The USB has a frequency accuracy requirement of ±200 ppm.

The USB control logic must be clocked at >30 MHz. A

USBPHYCLK for clocking the USB PHY is also available and

must use a 60 MHz clock.

The low frequency clocking is optimized for ultralow power

applications. The RTC requires that the 32.768 kHz XTAL be

activated to run for 12 hours off a fully charged 0.08 F super

capacitor.

Real Time Clock

The RTC contains a low power crystal oscillation circuit that

operates in conjunction with a 32,768 Hz external crystal. It

achieves 25 ppm performance in keeping time at 25°C when

used with a 10 ppm crystal class load capacitors.

Features of the RTC include

• A 32-bit count register of the time in seconds from a known

reference point.

• A prescaler that divides down the 32,768 Hz crystal input to

1 Hz to advance the seconds count.

• RTC alarm and interrupt flags.

• Digital trim capability to allow a positive or negative

adjustment to the RTC count at fixed intervals.

DISPLAY OPTIONS

LCD Segment Display Driver and Controller

The ADuCM350 contains an on-chip LCD controller capable of

directly driving an LCD panel. For LCD functionality, 36 pins

are available on the device.

The LCD controller supports driving up to 128 segments, as

well as selectable multiplex option. The static option consists of

one backplane × 32 frontplanes and the 4× mux option consists

of four backplanes × 32 frontplanes. The LCD controller also

supports LCD waveform voltages that are generated using

internal charge pump circuitry and support levels from 2.4 V up

to 3.6 V LCDs, programmable frame rates, interrupt generation

at the frame boundary (for updating LCD data), and the LCD

frame clock (generated by using the on-board 32 kHz crystal).

LCD Display Controller Options

The LCD controller also has the ability to drive external LCD

display modules. It has 25 pins for the display interface, which

support data transfers of up to 16 bits.

Display controller supports Type A, Type B, and Type C of the

MIPI DBI Specification Version 2.0. Specifically, both Fixed-E

mode and Clocked-E mode options of the Type A interface are

supported, as well as all bus width options (8-/9-/16-bit data) for

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