ADUCM350BBCZ datasheet(35/41 Pages) AD

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ADuCM350

Data Sheet

Rev. A | Page 34 of 40

MICROSUBSYSTEM

MEMORIES

The memory offerings for the ADuCM350 are as follows:

• 384 kB flash.

• 16 kB of flash configured for EEPROM emulation.

• 2 kB user information.

• 32 kB SRAM.

• 2 kB dedicated SRAM for USB endpoint.

Flash

The ADuCM350 includes 384 kB of embedded flash memory,

accessed using the flash controller. The flash controller is con-

nected to the bus matrix as a slave device for core and DMA

access, as well as the 32-bit AHB for MMR access.

The flash controller supports 384 kB of user space and 2 kB of

information space. Read and write to flash are executed via

AHB only. The 384 kB flash memory comprises one 256 kB

flash array and one 128 kB flash array. The 256 kB flash

memory array and 128 kB flash array are controlled by two

separate flash controllers with separate register controls.

With respect to flash integrity, the device supports

• Automatic signature check of information space at reset

• User signature for application code

• Parity checking on a per access basis

• 20,000 cycle endurance with 20 ms erase and 20 μs program

• 100-year data retention at room temperature

General-Purpose Flash

The device contains 16 kB of embedded flash memory for

general purpose, such as EEPROM emulation.

SRAM

There is 32 kB of SRAM on chip of which 16 kB is retained

during hibernate mode and an optional 16 kB can be retained

during hibernate for reduced leakage current.

DEBUG CAPABILITY

The ADuCM350 supports two types of debug host interface:

4-wire JTAG debug (JTAG) interface and a serial 2-wire debug

(SWD) interface.

The ADuCM350 incorporates the complete embedded trace of

the ARM Cortex-M3 features to maximize code analysis, system

profiling, and debugging capabilities.

PROGRAMMABLE GPIOS

The ADuCM350 has 66 GPIO pins, most of which have

multiple, configurable functions defined by user code. They can

be configured as an input/output and have programmable pull-

up or pull-down resistors. All I/O pins are functional over the

full supply range (VBAT = 1.8 V to 3.6 V).

In power saving mode, GPIO pins retain state; they tristate on

reset to prevent any bus irritation. GPIOs of note are as follows:

• 32 pins multiplexed with LCD segment common pins

• Six pins multiplexed with CapTouch

• Nine pins on a dedicated VDDIO for ease of interfacing to

peripherals

TIMERS

General-Purpose Timers

ADuCM350 has three identical general-purpose timers, each

with a 16-bit count-up/count-down counter. The count-

up/count-down counter can be clocked from one of four user

selectable clock sources. Any selected clock source can be scaled

down using a prescaler of 16, 256, or 32,768.

Watch Dog Timer (WDT)

The watchdog timer is a 16-bit count-down timer with a program-

mable prescaler. The prescaler source is selectable and can be

scaled by a factor of 1, 16, 256, or 4096. The watchdog timer is

clocked either by the 32 kHz crystal oscillator (LFXTAL) or by

the 32 kHz on-chip oscillator (LFOSC).The watchdog timer

(WDT) is used to recover from an illegal software state. After

the WUT is enabled by user code, it requires periodic servicing

to prevent it from forcing a reset or interrupt of the processor. A

WDT timeout can generate a reset or an interrupt.

Wake-Up Timer

The wake-up timer (WUT) consists of a 32-bit counter clocked

from the 32 kHz external crystal (LFXTAL), 32 kHz internal

oscillator (LFOSC), or peripheral clock (PCLK). The selected

clock source can be scaled

USB

The USB port on the ADuCM350 is a USB 2.0 full speed com-

pliant port. The module consists of the USB controller, USB

PHY, USB RAM, and a 2-channel DMA. An integrated regulator

60 MHz clock capability is available for clock generation.

The USB supports bulk, isochronous, interrupt, and control modes.

It has seven hardware endpoint and a dedicated 2-channel DMA. It

supports suspend and wakeup.

The controller hardware is supplemented by a complete set of

USB device class drivers to provide complete USB functionality

using a defined Micrium stack. The USB stack has a requirement

for an RTOS to be on the system. Analog Devices, Inc., has

developed its system using the Micrium μC/OS-II.

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