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ICS9FG108 датащи(PDF) 10 Page - Integrated Circuit Systems

номер детали ICS9FG108
подробное описание детали  Programmable FTG for Differential P4 CPU, PCI-Express & SATA Clocks
PDF  13 Pages
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производитель  ICST [Integrated Circuit Systems]
домашняя страница  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS9FG108 датащи(HTML) 10 Page - Integrated Circuit Systems

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10
Integrated
Circuit
Systems, Inc.
ICS9FG108
Advance Information
0823—04/02/04
I
2C Table: Vendor & Revision ID Register
Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
RID3
R
-
-
0
Bit 6
RID2
R
-
-
0
Bit 5
RID1
R
-
-
0
Bit 4
RID0
R
-
-
0
Bit 3
VID3
R
-
-
0
Bit 2
VID2
R
-
-
0
Bit 1
VID1
R
-
-
0
Bit 0
VID0
R
-
-
1
I
2C Table: DEVICE ID
Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
R0
Bit 6
R0
Bit 5
R0
Bit 4
R0
Bit 3
R1
Bit 2
R0
Bit 1
R0
Bit 0
R0
I
2C Table: Byte Count Register
Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
BC7
RW
-
-
0
Bit 6
BC6
RW
-
-
0
Bit 5
BC5
RW
-
-
0
Bit 4
BC4
RW
-
-
0
Bit 3
BC3
RW
-
-
0
Bit 2
BC2
RW
--
1
Bit 1
BC1
RW
--
1
Bit 0
BC0
RW
-
-
1
RESERVED
RESERVED
Device ID = 08 hex
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Byte 4
-
REVISION ID
-
-
-
-
-
VENDOR ID
-
-
-
-
-
-
-
Byte 5
-
-
-
Byte 6
Writing to this
register will
configure how
many bytes
will be read
back, default
is 07 = 7
bytes.
-
-
-
-
-
-
-
-



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