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ICS9FG108 датащи(PDF) 9 Page - Integrated Circuit Systems

номер детали ICS9FG108
подробное описание детали  Programmable FTG for Differential P4 CPU, PCI-Express & SATA Clocks
PDF  13 Pages
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производитель  ICST [Integrated Circuit Systems]
домашняя страница  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS9FG108 датащи(HTML) 9 Page - Integrated Circuit Systems

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9
Integrated
Circuit
Systems, Inc.
ICS9FG108
Advance Information
0823—04/02/04
I
2C Table: Output Stop Mode Register
Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
DIF_7
Output Control
RW
Free-run
Stop-able
0
Bit 6
DIF_6
Output Control
RW
Free-run
Stop-able
0
Bit 5
DIF_5
Output Control
RW
Free-run
Stop-able
0
Bit 4
DIF_4
Output Control
RW
Free-run
Stop-able
0
Bit 3
DIF_3
Output Control
RW
Free-run
Stop-able
0
Bit 2
DIF_2
Output Control
RW
Free-run
Stop-able
0
Bit 1
DIF_1
Output Control
RW
Free-run
Stop-able
0
Bit 0
DIF_0
Output Control
RW
Free-run
Stop-able
0
I
2C Table: Frequency Select Readback Register
Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
SEL14M_25M#
1
(FS3)
State of pin 27
R
Pin 27
Bit 6
FS2
1
State of pin 6
R
Pin 6
Bit 5
FS1
1
State of pin 44
R
Pin 44
Bit 4
FS0
1
State of pin 45
R
Pin 45
Bit 3
SPREAD
1
State of pin 26
R
Off
On
Pin 26
Bit 2
RX
Bit 1
RX
Bit 0
RX
Notes:
1. These bits reflect the state of the corresponding pins, regardless of whether software
programming is enabled or not.
Byte 2
-
-
Byte 3
6
-
-
-
-
27
45
44
-
-
See Frequency
Selection Table, Page 1
26
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED



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