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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AM79C970 датащи(PDF) 165 Page - Advanced Micro Devices |
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AM79C970 датащи(HTML) 165 Page - Advanced Micro Devices |
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165 / 168 page  AMD 1-1032 Am79C970 DATA SHEET REVISION SUMMARY The following list represents the key differences be- tween revision B (May 1994) and revision C (June 1994). Global Change DWIO mode cannot be set by reading the EEPROM or writing directly to BCR18. The Initialization Block must be on a double-word boundary. Detailed Functions Page 1-888: The section on PCnet-PCI controller I/O Resource Map- ping is rewritten to reflect changes in methods of setting DWIO mode. User Accessible Registers Page 1-955: CSR1 The description for Initialization Block boundary require- ment is rewritten for clarity. Page 1-967: CSR58 The description for bit 8 (SSIZE32) is rewritten for clarity. Page 1-982: BCR18 The description for bit 7 (DWIO) is rewritten for clarity. The following list represents the key differences be- tween revision A (October 1993) and revision B (April 1994). Page 1-987: BCR20 The description for bit 8 (SSIZE32) is rewritten for clarity. Global Change Look-Ahead Packet Processing (LAPP) is the name for the early protocol analysis. Block Diagram Page 1-869: The LOCK pin is changed from bidirectional to unidirec- tional. It is now an input only. The EESK/ LED1 pin is now changed to bidirectional for typographical correction. Connection Diagram Page 1-877: Various pin names have been changed for either en- hanced clarity or to correct typographical errors. The pins that are affected are 9, 58, 91, 94, 96, 97, 98, 100, 103, 108, 116, and 127. Pin Designations Page 1-879: Various pin names have been changed for either en- hanced clarity or to correct typographical errors. The pins that are affected are 9, 58, 91, 94, 96, 97, 98, 100, 103, 108, 116, and 127. Page 1-880: The LOCK pin is changed from an I/O to an input. No driver type is available. Page 1-881: The IOH value for TS3 and TS6 are now –2. Driver type O6 is removed. Driver type O8 is added. Pin Description Page 1-882: Pin descriptions for various pins were rewritten for clar- ity. The pins are GNT, LOCK, and PERR. Detailed Functions Page 1-937: Table 8 EEPROM Contents—Corrected the Hardware ID (byte address 09h) value to 11h. Page 1-944: Figure 30 NAND Tree—Typographical errors were corrected. User Accessible Regisers Page 1-956: CSR3 The bit name for bit 5 is changed to LAPPEN (Look- Ahead Packet Processing ENable). Page 1-958: CSR4 The bit name for bit 9 is changed to MFCO (Missed Frame Counter Overflow), and the bit name for bit 8 is changed to MFCOM (Missed Frame Counter Overflow Mask). Page 1-971: CSR80—The description for bits 9–8 is rewritten for clarity. Page 1-974: CSR89—The upper 12 bits of the PCnet–PCI controller part number contained in bits 11–0 are corrected. The 12 bits now read 0010 0100 0011b. CSR90—The description for this register is removed, because it is now a reserved register. Page 1-975: CSR124—The description for bit 3 is rewritten for clarity. |
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