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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AM79C970 датащи(PDF) 153 Page - Advanced Micro Devices |
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AM79C970 датащи(HTML) 153 Page - Advanced Micro Devices |
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153 / 168 page  AMD 1-1020 Am79C970 18220C-53 PCnet-PCI VDD plane VSS plane 33 uF to 10 uF 1 Ω to 10 Ω AVDD2 AVSS2 To determine the value for the resistor and capacitor, the formula is: R * C ≥ 88 Where R is in Ohms and C is in microfarads. Some pos- sible combinations are given below. To minimize the voltage drop across the resistor, the R value should not be more than 10 Ω. 2.7 Ω 33 µF 4.3 Ω 22 µF 6.8 Ω 15 µF 10 Ω 10 µF RC AVSS2 and AVDD2/AVDD4: These pins provide power and ground for the AUI and twisted pair receive circuitry. In addition, as mentioned earlier, AVSS2 and AVDD2 provide power and ground for the phase-lock loop por- tion of the chip. Except for the filter circuit already men- tioned, no specific decoupling is necessary on these pins. AVDD1: AVDD1 provides power for the control and in- terface logic in the PLL. Ground for this logic is provided by digital ground pins. No specific decoupling is neces- sary on this pin. Special Note for Adapter Cards: In adapter card de- signs, it is important to utilize all available power and ground pins available on the bus edge connector. In addition, the connection from the bus edge connector to the power or ground plane should be made through more than one via and with wide traces (15 mils desir- able) wherever possible. Following these recommenda- tions results in minimal inductance in the power and ground paths. By minimizing this inductance, ground bounce is minimized. |
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