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LAN8740Ai-EN датащи(PDF) 72 Page - Microchip Technology |
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LAN8740Ai-EN датащи(HTML) 72 Page - Microchip Technology |
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72 / 136 page ![]() LAN8740A/LAN8740Ai DS00001987A-page 72 2013-2015 Microchip Technology Inc. 4.2.13 MODE CONTROL/STATUS REGISTER Index (In Decimal): 17 Size: 16 bits Bits Description Type Default 15:14 RESERVED RO - 13 EDPWRDOWN Enable the Energy Detect Power-Down (EDPD) mode: 0 = Energy Detect Power-Down is disabled. 1 = Energy Detect Power-Down is enabled. Note: When in EDPD mode, the device’s NLP characteristics can be modified via the EDPD NLP/Crossover Time/EEE Configuration Register. R/W 0b 12:10 RESERVED RO - 9 FARLOOPBACK Enables far loopback mode (i.e., all the received packets are sent back simul- taneously (in 100BASE-TX only)). This bit is only active in RMII mode. This mode works even if the Isolate bit (0.10) is set. 0 = Far loopback mode is disabled. 1 = Far loopback mode is enabled. Refer to Section 3.8.12.2, "Far Loopback" for additional information. R/W 0b 8:7 RESERVED RO - 6 ALTINT Alternate Interrupt Mode: 0 = Primary interrupt system enabled (Default) 1 = Alternate interrupt system enabled Refer to Section 3.6, "Interrupt Management" for additional information. R/W 0b 5:2 RESERVED RO - 1 ENERGYON Indicates whether energy is detected. This bit transitions to “0” if no valid energy is detected within 256 ms. It is reset to “1” by a hardware reset and is unaffected by a software reset. Refer to Section 3.8.3.2, "Energy Detect Power-Down (EDPD)" for additional information. RO 1b 0 RESERVED R/W 0b |
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