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TLE7186F датащи(PDF) 38 Page - Infineon Technologies AG |
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TLE7186F датащи(HTML) 38 Page - Infineon Technologies AG |
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38 / 39 page ![]() Data Sheet 38 Rev. 1.2, 2016-01-28 TLE7186F Revision History 13 Revision History Revision Date Changes Rev. 1.2 2016-01-28 - package adjustments Rev. 1.1 2011-04-08 - Voltage difference between ISP and ISN specified - Minimum buffer capacitor CVREG specified - Description of SH currents added - Fig. 4 new - Pull up and pull down resistors at IHx and ILx expanded - Rise and fall times specified - Propagation time tolerance reduced - Limit the lower load current of VDD to 2mA - Fig. 5 updated - Steady state differential input voltage range across VIN removed - Common mode suppression, footnote added - IFMA low time to guarantee wake-up added - Matching of IFMA pull up / pull down resistors replaced by IFMA input current / VS - Pull up resistor at IFuC output expanded - Pull up resistor at INHD expanded - High level input voltage INH (for INHD=high) adapted - Dead time description improved - Short circuit detection accuracy improved - SCDL open pin detection level hysteresis, footnote added - Rise time ERR adapted - Pull down resistor at ERR output expanded - INH high time to guarantee wake-up added - Analog temperature output tolerance at 25°C improved |
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