STM8AL3188TCX datasheet(115/131 Pages) STMICROELECTRONICS

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STM8AL318x STM8AL3L8x

Electrical parameters

117

9.3.15

EMC characteristics

Susceptibility tests are performed on a sample basis during product characterization.

Functional EMS (electromagnetic susceptibility)

Based on a simple running application on the product (toggling 2 LEDs through I/O ports),

the product is stressed by two electromagnetic events until a failure occurs (indicated by the

LEDs).

•

ESD: Electrostatic discharge (positive and negative) is applied on all pins of the device

until a functional disturbance occurs. This test conforms to the ANSI/ESDA/JEDEC JS-

001, JESD22-A115 and ANSI/ESD S5.3.1.

•

FTB: A burst of fast transient voltage (positive and negative) is applied to VDD and VSS

through a 100 pF capacitor, until a functional disturbance occurs. This test conforms

with the IEC 61000 standard.

A device reset allows normal operations to be resumed. The test results are given in the

table below based on the EMS levels and classes defined in application note AN1709.

Designing hardened software to avoid noise problems

EMC characterization and optimization are performed at component level with a typical

application environment and simplified MCU software. It should be noted that good EMC

performance is highly dependent on the user application and the software in particular.

Therefore it is recommended that the user applies EMC software optimization and

prequalification tests in relation with the EMC level requested for his application.

Prequalification trials:

Most of the common failures (unexpected reset and program counter corruption) are

reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1

second.

To complete these trials, ESD stress is applied directly on the device, over the range of

specification values. When unexpected behavior is detected, the software is hardened to

prevent unrecoverable errors occurring (see application note AN1015).

Table 60. EMS data

Symbol

Parameter

Conditions

Level/

Class

VFESD

Voltage limits to be applied on

any I/O pin to induce a functional

disturbance

VDD = 3.3 V, TA = +25 °C,

fCPU= 16 MHz,

conforms to IEC 61000

VEFTB

Fast transient voltage burst limits

to be applied through 100 pF on

VDD and VSS pins to induce a

functional disturbance

VDD = 3.3 V, TA = +25 °C,

fCPU = 16 MHz,

conforms to IEC 61000

Using HSI

Using HSE

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