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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32F334X4 датащи(PDF) 17 Page - STMicroelectronics |
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STM32F334X4 датащи(HTML) 17 Page - STMicroelectronics |
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17 / 115 page  DocID025409 Rev 5 17/115 STM32F334x4 STM32F334x6 STM32F334x8 Functional overview 43 3.6 Clocks and startup System clock selection is performed on startup, however the internal RC 8 MHz oscillator is selected as default CPU clock on reset. An external 4-32 MHz clock can be selected, in which case it is monitored for failure. If failure is detected, the system automatically switches back to the internal RC oscillator. A software interrupt is generated if enabled. Similarly, full interrupt management of the PLL clock entry is available when necessary (for example with failure of an indirectly used external oscillator). Several prescalers allow to configure the AHB frequency, the high speed APB (APB2) and the low speed APB (APB1) domains. The maximum frequency of the AHB and the high speed APB domains is 72 MHz, while the maximum allowed frequency of the low speed APB domain is 36 MHz. TIM1and HRTIM1 maximum frequency is 144 MHz. |
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