PM7345 datasheet(39/306 Pages) PMC

39 / 306 page

PM7345 S/UNI-PDH

DATA SHEET

PMC-931011

ISSUE 6

SATURN USER-NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

REOC/

OOF

Tristate

Receive End of Cell (REOC). REOC is asserted

when the 53rd octet of the 53 octet cell is being

read from the receive FIFO. RSOC is tristatable in

the 100-pin PQFP package when TSEN is logic 1. It

is forced tristate while FRDB is high and the receive

FIFO is not bypassed (when SYFIFOB is logic 1), or

while RRDENB is sampled high by the rising edge

of RFCLK (when SYFIFOB is logic 0). The RSOC

logic value is driven on the pin while FRDB is low

(asynchronous FIFO interface) or while RRDENB is

sampled logic 0 (synchronous interface). REOC is

updated on the rising edge of FRDB or RFCLK.

PLCP Out of Frame (OOF). OOF is asserted while

the PLCP receiver is in an out of frame state. OOF

may be used to indicate the valid/invalid status of

the FRDATA[7:0] octets to a higher layer processing

entity while the receive FIFO is bypassed. OOF is

updated on the falling edge of FRCLK.

The REOC/OOF pin function selection is controlled

by the FIFOBP bit in the S/UNI-PDH Configuration

FRDATA[7]

FRDATA[6]

FRDATA[5]

FRDATA[4]

FRDATA[3]

FRDATA[2]

FRDATA[1]

FRDATA[0]

Tristate

Receive FIFO Data (FRDATA[7:0]). FRDATA[7:0]

contains the cell octet that is read from the receive

FIFO. The FRDATA[7:0] bus is tristatable in the 100-

pin PQFP package when TSEN is logic 1.

FRDATA[7:0] is forced tristate while FRDB is high

and the receive FIFO is not bypassed (when

SYFIFOB is logic 1), or while RRDENB is sampled

high by the rising edge of RFCLK (when SYFIFOB

is logic 0). The octet read from the receive FIFO is

driven on the FRDATA[7:0] bus while FRDB is low

(asynchronous FIFO interface) or while RRDENB is

sampled logic 0 (synchronous interface).

FRDATA[7:0] is updated on the falling edge of

FRCLK when the receive FIFO is bypassed.

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