LM2647 datasheet(16/25 Pages) NSC

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Application Information

CURRENT LIMIT RESISTOR

The timing scheme implemented in the LM2647 makes it

possible for the IC to continue monitoring an overcurrent

condition and to respond appropriately every cycle. This is

explained as follows.

Consider the LM2647 working under normal conditions, just

before an overload occurs. After the end of a given ON-pulse

(say ‘ton1’), the LM2647 starts sampling the current in the

low-side FET. This is the OFF-duration called ‘toff1’ in this

analysis. Therefore, if an overcurrent condition is detected

during this OFF-duration ‘toff1’, the controller will decide to

omit the next ON-pulse (which would have occurred during

the duration ‘ton2’). This is done by setting an internal ‘over-

current latch’ which will keep HDRV low. The LDRV will now

not only stay high during the present OFF-duration (‘toff1’)

but during the duration of the next (omitted) ON-pulse

(‘ton2’), and then as expected also during the succeeding

OFF-duration (‘toff2’). But the ‘overcurrent latch’ is reset at

the very start of the next OFF-duration ‘toff2’. Therefore if the

overcurrent condition persists, it can be recognized during

‘toff2’ and a decision to skip the next ON-pulse (duration

‘ton3’) can be taken. Finally, several ON-pulses may get

skipped until the current in the lower FET falls below the

current limit threshold.

Note that about 150ns after LDRV first goes high (start of

low-side conduction), the current monitoring starts. There-

fore the peak current seen by the current limit detector is

almost the same as the peak inductor current.

To set the value of the current limiting resistor (‘RLIM’, be-

tween ILIM pin and SW pin), the function of the ILIM pin must

be understood. Refer to Figure 11 to see how the voltage on

the ILIM pin changes as current ramps up. For this analysis

note that the worst case has been taken here by using the

minimum possible value of the current sourced (I

ILIM, see

Electrical Characteristics table). Also, the maximum value of

the ‘hot’ Rds of the lower FET should be used. For example

if the chosen low-side FET is the Si4420DY from Vishay, the

typical Rds at room temperature is 10m

Ω (but this is not the

value to be used here). The MAX is the relevant number

which is 13m

Ω. Now applying the thumbrule that at 100˚C

the Rds goes up typically 1.4 times (for 30V FETs), the Rds

to be used in the actual current limit calculation is

1.4*13m

Ω=18.2mΩ. Therefore using 46µA for I

ILIM

(see

Electrical Characteristics table) and Rds = 18.2m

Ω here will

provide the lowest value of current limit (considering toler-

ances and temperature for a chosen RLIM resistor). This

current limit must obviously be higher than the actual peak

current in the converter under normal operation to ensure

that full rated power can be delivered under all conditions by

the converter without ‘inadvertently’ hitting the worst case

(lowest value) set current limit.

The detector sets the overcurrent latch as soon the voltage

on the ILIM pin crosses below zero. Therefore the basic

design equation for calculating RLIM is:

∆V = v (see Figure 11)

At the point where current limiting occurs (peak inductor

current becomes equal to current limit) the resistor for setting

the current limit can be calculated.

But what (peak) current limit value should actually be set?

This depends on two factors:

a) There is a natural steady state peak current in the inductor

with the converter delivering maximum rated load. This

should be calculated at VIN

MAX (the maximum of the input

voltage range):

b) Over and above this steady state value we need to

provide an ‘overload margin’. This margin will depend on the

step loads likely to be seen in the application and the re-

sponse expected.

The equation for calculating the steady state peak current is:

where ‘r’ is the current ripple ratio (refer to Application Note

AN-1197 at http://power.national.com for a detailed under-

standing of how ‘r’ affects all the power components). ‘r’ is

given by:

where L is in µH, f is in Hz.

Example: Let VIN range from 5.5V to 28V, Vo=5V, Io=3A,

L=10µH, f=300kHz. What is the peak current under normal

operation?

Only the highest input voltage must be used for any peak

current calculation. At VIN

MAX the duty cycle is D=Vo/Vin=5/

28=18%. So

Note: In general, as discussed in AN-1197, the optimum value of ‘r’ is

between 0.3 to 0.5. Large inductances (higher than ‘optimum’) may be

20056319

FIGURE 11. Understanding Current Sensing

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