HV7321 datasheet(17/30 Pages) MICROCHIP

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DS20005639A-page 17

HV7321

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLE

Symbol

Description

1CWIN0

External CW input for channel 0

SEL1

SEL input logic pin selects transmission high-voltage rails for channel 1. If SEL = 0,

select VPP0/VNN0. If SEL = 1, select VPP1/VNN1. See Table 1-1.

3NEG1

NEG input logic pin turns on/off corresponding output N-channel MOSFET for

channel 1. See Table 1-1.

4POS1

POS input logic pin turns on/off corresponding output P-channel MOSFET for channel 1.

See Table 1-1.

5CWIN1

External CW input for channel 1

6OEN

Output enable logic input pin. When OEN = VLL, the transmitter outputs are enabled.

When OEN = 0, the transmitter outputs are disabled.

7PWS

Logic input pin. When PWS = 0, the output FETs for VPP1 and VNN1 are scaled down to

reduce the output current for CW Mode-0.

CLK

Re-timing clock input pin. Connect CLK to ground for transparent mode.

9, 22, 59

GND

Ground

VLL

Input logic power supply pin

REN

Enable pin for the built-in voltage regulators.See section Section 4.3 “Operation

Modes”

for details.

SEL2

SEL input logic pin selects transmission high-voltage rails for channel 2. If SEL = 0,

select VPP0/VNN0. If SEL = 1, select VPP1/VNN1. See Table 1-1.

NEG2

NEG input logic pin turns on/off corresponding output N-channel MOSFET for

channel 2. See Table 1-1.

POS2

POS input logic pin turns on/off corresponding output P-channel MOSFET for channel 2.

See Table 1-1.

CWIN2

External CW input for channel 2

SEL3

SEL input logic pin selects transmission high-voltage rails for channel 3. If SEL = 0,

select VPP0/VNN0. If SEL = 1, select VPP1/VNN1. See Table 1-1.

NEG3

NEG input logic pin turns on/off corresponding output N-channel MOSFET for

channel 3. See Table 1-1.

POS3

POS input logic pin turns on/off corresponding output P-channel MOSFET for channel 3.

See Table 1-1.

CWIN3

External CW input for channel 3

OTPN

Temperature sensor open drain output

21, 60

VDD

+5V supply

VGP

+10V supply pin for the linear regulator

24, 25, 56, 57

VPP0

Positive high-voltage supply pin. VPP0 must be equal to or greater than VPP1.

26, 55

CPF0

Internal linear regulator output pin. Connect 2 µF 10V capacitor to VPP0.

27, 54

CNF0

Internal linear regulator output pin. Connect 2 µF 10V capacitor to VNN0.

28, 29, 52, 53

VNN0

Negative high-voltage supply pin. VNN0 must be equal to or more negative than VNN1,2

30, 51

VNN2

Negative high-voltage supply pin. VNN2 connects to the most negative supply rail.

31, 50

VNN1

Negative high-voltage supply pin. VNN1 must be equal to or less negative than VNN0.

32, 49

CNF1

Internal linear regulator output pin. Connect 2 µF 10V capacitor to VNN1.

33, 48

CPF1

Internal linear regulator output pin. Connect 2 µF 10V capacitor to VPP1.

34, 47

VPP1

Positive high voltage supply VPP1. Must be equal to or lower than VPP0.

TX3

Channel 3 transmitter output pin

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