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MIC2875 датащи(PDF) 17 Page - Microchip Technology |
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MIC2875 датащи(HTML) 17 Page - Microchip Technology |
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17 / 24 page ![]() 2015 Microchip Technology Inc. DS20005549A-page 17 MIC2875 8.0 PCB LAYOUT GUIDELINES PCB layout is critical to achieve reliable, stable and efficient performance. A ground plane is required to control EMI and minimize the inductance in power, signal and return paths. The following guidelines should be followed to ensure proper operation of the device. Please refer to the MIC2875 evaluation board document for the recommended components placement and layouts. 8.1 Integrated Circuit (IC) • Place the IC close to the point-of-load. • Use fat traces to route the input and output power lines. • Analog grounds and power ground should be kept separate and connected at a single location at the PCB pad for exposed pad of the IC. • Place as much as thermal vias on the PCB pad for exposed pad and connected it to the ground plane to ensure a good PCB thermal resistance can be achieved. 8.2 IN Decoupling Capacitor • The IN decoupling capacitor must be placed close to the IN pin of the IC and preferably connected directly to the pin and not through any via. The capacitor must be located right at the IC. • The IN decoupling capacitor should be connected as close as possible to AGND. • The IN terminal is noise sensitive and the placement of capacitor is very critical. 8.3 VIN Power Path Bulk Capacitor • The VIN power path bulk capacitor should be placed and connected close to the VIN supply to the power inductor and the PGND of the IC. • Use either X5R or X7R temperature rating ceramic capacitors. Do not use Y5V or Z5U type ceramic capacitors. 8.4 Inductor • Keep both the inductor connections to the switch node (SW) and input power line short and wide enough to handle the switching current. Keep the areas of the switching current loops small to minimize the EMI problem. • Do not route any digital lines underneath or close to the inductor. • Keep the switch node (SW) away from the noise sensitive pins. • To minimize noise, place a ground plane underneath the inductor. 8.5 Output Capacitor • Use wide and short traces to connect the output capacitor as close as possible to the OUT and PGND pins without going through via holes to minimize the switching current loop during the main switch off cycle and the switching noise. • Use either X5R or X7R temperature rating ceramic capacitors. Do not use Y5V or Z5U type ceramic capacitors. |
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