P87LPC760 datasheet(8/56 Pages) PHILIPS

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Philips Semiconductors

Preliminary data

P87LPC760

Low power, low price, low pin count (14 pin)

microcontroller with 1 kbyte OTP

2002 Mar 07

PIN DESCRIPTIONS

MNEMONIC

PIN NO.

TYPE

NAME AND FUNCTION

P0.3–P0.6

10, 12–14

I/O

Port 0: Port 0 is an 4-bit I/O port with a user-configurable output type. Port 0 latches are

configured in the quasi-bidirectional mode and have either ones or zeros written to them

during reset, as determined by the PRHI bit in the UCFG1 configuration byte. The operation

of port 0 pins as inputs and outputs depends upon the port configuration selected. Each port

pin is configured independently. Refer to the section on I/O port configuration and the DC

Electrical Characteristics for details.

The Keyboard Interrupt feature operates with port 0 pins.

Port 0 also provides various special functions as described below.

P0.3

CIN1B

Comparator 1 positive input B.

P0.4

CIN1A

Comparator 1 positive input A

P0.5

CMPREF

Comparator reference (negative) input.

P0.6

CMP1

Comparator 1 output

P1.0–P1.3

P1.5, P1.7

1–2

6–9

I/O

Port 1: Port 1 is an 6-bit I/O port with a user-configurable output type, except for three pins

as noted below. Port 1 latches are configured in the quasi-bidirectional mode and have ei-

ther ones or zeros written to them during reset, as determined by the PRHI bit in the UCFG1

configuration byte. The operation of the configurable port 1 pins as inputs and outputs de-

pends upon the port configuration selected. Each of the configurable port pins are pro-

grammed independently. Refer to the section on I/O port configuration and the DC Electrical

Characteristics for details.

Port 1 also provides various special functions as described below.

P1.0

TxD

Transmitter output for the serial port.

P1.1

RxD

Receiver input for the serial port.

I/O

P1.2

Timer/counter 0 external count input or overflow output.

SCL

I2C serial clock input/output. When configured as an output,

P1.2 is open drain, in order to conform to I2C specifications.

I/O

P1.3

INT0

External interrupt 0 input.

SDA

I2C serial data input/output. When configured as an output, P1.3

is open drain, in order to conform to I2C specifications.

P1.5

RST

External Reset input (if selected via EPROM configuration). A

low on this pin resets the microcontroller, causing I/O ports and

peripherals to take on their default states, and the processor

begins execution at address 0. When used as a port pin, P1.5 is

a Schmitt trigger input only.

P2.0–P2.1

4, 5

I/O

Port 2: Port 2 is a 2-bit I/O port with a user-configurable output type. Port 2 latches are con-

figured in the quasi-bidirectional mode and have either ones or zeros written to them during

reset, as determined by the PRHI bit in the UCFG1 configuration byte. The operation of port

2 pins as inputs and outputs depends upon the port configuration selected. Each port pin is

configured independently. Refer to the section on I/O port configuration and the DC Electri-

cal Characteristics for details.

Port 2 also provides various special functions as described below.

P2.0

Output from the oscillator amplifier (when a crystal oscillator

option is selected via the EPROM configuration).

CLKOUT

CPU clock divided by 6 clock output when enabled via SFR bit

and in conjunction with internal RC oscillator or external clock

input.

P2.1

Input to the oscillator circuit and internal clock generator circuits

(when selected via the EPROM configuration).

VSS

Ground: 0 V reference.

VDD

Power Supply: This is the power supply voltage for normal operation as well as Idle and

Power Down modes.

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