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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST92196A датащи(PDF) 155 Page - STMicroelectronics |
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ST92196A датащи(HTML) 155 Page - STMicroelectronics |
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155 / 268 page  155/268 - ON SCREEN DISPLAY CONTROLLER (OSD) OSD CONTROLLER (Cont’d) Bit 3 = NIDS Non Interlaced Display control bit This bit selects the interlaced or non-interlaced mode. 0: The display works in interlaced mode (line counting, fringe and rounding algorithms are 2- field based) 1: The display works in non-interlaced mode (line counting, fringe and rounding algorithms are 1- field based). Bit 2 = TSLE Translucency Enable bit This bit enables or disables the digital translucen- cy signal (TSLU) generation. (Refer to the Section 8.5.3.11). 0: The TSLU signal built by the Display controller remains continuously idle regardless of the OSD activity. 1: The TSLU signal carries the real time back- ground information and can be output through the I/O pin alternate function. Bit 1 = MOPE Mouse Pointer Enable. This bit enables or disables the Mouse Pointer. 0: The Mouse Pointer is disabled 1: The Mouse Pointer is enabled. Note: When the Mouse Pointer feature is not im- plemented, this bit becomes "reserved". The MOPE bit also acts as a Mouse Pointer inter- rupt Enable: enabling the Mouse pointer allows automatically enables the Mouse Pointer interrupt generation. Bit 0 = FPIXC Fast Pixel Clock control bit This bit handles the divide-by-2 prescaler inserted between the Skew Corrector output and the Dis- play Pixel clock input. 0: The Skew corrector clock output is divided by 2 to provide the Pixel clock. 1: The Skew corrector clock output is directly tak- en as the Pixel Clock. Note: For further information, refer to the Timing and Clock Control chapter. |
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