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TUSB1002 датащи(PDF) 14 Page - Texas Instruments |
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TUSB1002 датащи(HTML) 14 Page - Texas Instruments |
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14 / 28 page ![]() 14 TUSB1002 SLLSEU4A – MAY 2016 – REVISED MAY 2016 www.ti.com Product Folder Links: TUSB1002 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 7.3 Feature Description 7.3.1 4-Level Control Inputs The TUSB1002 has (MODE, CFG1, CFG2, CH1_EQ1, CH1_EQ2, CH2_EQ1, and CH2_EQ2) 4-level inputs pins that are used to control the equalization gain and the output voltage swing dynamic range. These 4-level inputs use a resistor divider to help set the 4 valid levels and provide a wider range of control settings. There is an internal 45 k Ω pull-up and a 95 kΩ pull-down. These resistors, together with the external resistor connection combine to achieve the desired voltage level. Table 1. 4-Level Control Pin Settings LEVEL SETTINGS 0 Option 1: Tie 1 K Ω 5% to GND. Option 2: Tie directly to GND. R Tie 20 K Ω 5% to GND. F Float (leave pin open) 1 Option 1: Tie 1 K Ω 5% to VCC. Option 2: Tie directly to VCC. NOTE In order to conserve power, the TUSB1002 disables 4-level input’s internal pull-up/pull- down resistors after the state of 4-level pins have been sampled on rising edge of EN. A change of state for any four level input pin is not applied to TUSB1002 until after EN pin transitions from low to high. 7.3.2 Linear Equalization With a linear equalizer, the TUSB1002 can electrically shorten a particular channel allowing for longer run lengths. Figure 16. Linear Equalizer With a TUSB1002, the 28 in trace can be made to have similar insertion loss as the 12 inch trace. The receiver equalization level for each channel is determined by the state of the CHx_EQ1 and CHx_EQ2 pins, where x = 1 or 2. |
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