MCP9902 datasheet(10/50 Pages) MICROCHIP

10 / 50 page

MCP9902/3/4

DS20005382C-page 10

 2015-2016 Microchip Technology Inc.

4.4

THERM Output

The THERM output is asserted independently of the

ALERT output and cannot be masked. Whenever any

of the measured temperatures exceed the user

programmed Therm Limit values for the programmed

number of consecutive measurements, the THERM

output is asserted. Once it has been asserted, it will

remain asserted until all measured temperatures drop

below the Therm Limit minus the Therm Hysteresis

(also programmable).

When the THERM output is asserted, the THERM

status bits will likewise be set. Reading these bits will

not clear them until the THERM output is deasserted.

Once the THERM output is deasserted, the THERM

status bits will be automatically cleared.

4.5

THERM Pin Address Decoding

The Address decode is performed by pulling known

currents from VDD through the external resistor

causing the pin voltage to drop based on the

respective current/resistor relationship. This pin

voltage is compared against a threshold that

determines the value of the pull-up resistor.

The MCP9902/3/4-A SMBus slave address is deter-

mined by the pull-up resistor on the THERM/ADDR pin

as shown in Table 4-2.

The MCP9902-1 I2C/SMBus address is hard coded to

1001_100(r/w).

The MCP9902-2 I2C/SMBus address is hard coded to

1001_101(r/w).

The MCP9903-1 I2C/SMBus address is hard coded to

1001_100(r/w).

The MCP9903-2 I2C/SMBus address is hard coded to

1001_101(r/w).

The MCP9904-1 I2C/SMBus address is hard coded to

1001_100(r/w).

The MCP9904-2 I2C/SMBus address is hard coded to

1001_101(r/w).

4.6

ALERT/THERM2 Output

4.6.1

ALERT/THERM2 PIN INTERRUPT

MODE

When configured to operate in interrupt mode, the

ALERT/THERM2 pin asserts low when an out-of-limit

measurement (> high limit or < low limit) is detected on

any diode or when an external diode fault is detected.

The ALERT/THERM2 pin will remain asserted as long

as an out-of-limit condition remains. Once the

out-of-limit

condition

has

been

removed,

the

ALERT/THERM2 pin will remain asserted until the

appropriate status bits are cleared.

The ALERT/THERM2 pin can be masked by setting

the MASK_ALL bit. Once the ALERT/THERM2 pin has

been masked, it will be deasserted and remain deas-

serted until the MASK_ALL bit is cleared by the user.

Any interrupt conditions that occur while the

ALERT/THERM2 pin is masked will update the Status

masks (see Register 5-20).

The ALERT/THERM2 pin is used as an interrupt signal

or as an SMBus Alert signal that allows an SMBus

slave to communicate an error condition to the master.

One or more ALERT/THERM2 Outputs can be

hard-wired together.

4.6.2

ALERT/THERM2 PIN IN THERM

MODE

When the ALERT/THERM2 pin is configured to oper-

ate in THERM mode, it will be asserted if any of the

measured temperatures exceeds the respective high

limit. The ALERT/THERM2 pin will remain asserted

until all temperatures drop below the corresponding

high limit minus the Therm Hysteresis value.

When the ALERT/THERM2 pin is asserted in THERM

mode, the corresponding high limit status bits will be

set. Reading these bits will not clear them until the

ALERT/THERM2 pin is deasserted. Once the

ALERT/THERM2 pin is deasserted, the status bits will

be automatically cleared.

The MASK_ALL bit will not block the ALERT/THERM2

pin in this mode; however, the individual channel

masks (see Register 5-20) will prevent the respective

channel from asserting the ALERT/THERM2 pin.

4.6.3

DEFAULT POWER UP CONDITIONS

On power-up, the ALERT/THERM2 is disabled and the

MASK ALL (MSKAL) bit in the CONFIG register (see

been placed in the device, and is enabled at power up.

The FAULT TEST (FT_TST) bit in the Fault Status reg-

ister (see Register 5-20) will allow the assertion of the

ALERT/THERM2 pin when this test mode is enabled

once MSKAL is cleared. To use the ALERT/THERM2

functions described in this section, the MSKAL bit must

be set to ‘0’, and the FT_TST bit to ‘1’ in order for the

pin to function properly.

TABLE 4-2:

I2C/SMBUS ADDRESS

DECODE

Pull Up Resistor on

THERM pin (±5%)

SMBus Address

4.7 kΩ

1111_100 (r/w)b

6.8 kΩ

1011_100 (r/w)b

10 kΩ

1001_100 (r/w)b

15 kΩ

1101_100 (r/w)b

22 kΩ

0011_100 (r/w)b

33 kΩ

0111_100 (r/w)b

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