TABLE 2. FPD85310 Programmable Register Definition (Continued)

Control

Registers

EEPROM

Address

The control registers provide mode setting information to the input and output interfaces.

Output

Enable/Polarity

Control

DB

[0]

OCLK Enable (1-On, 0-TRI-STATE)

[1]

OCLK Polarity (1-Per Datasheet, 0-Inverted)

[2]

ECLK Enable (1-On, 0-TRI-STATE)

[3]

ECLK Polarity (1-Per Datasheet, 0-Inverted)

[4]

ORGB/OSP/OPOL Enable (1-On, 0-TRI-STATE)

[5]

ERGB/ESP/EPOL Enable (1-On, 0-TRI-STATE)

[7:6]

OSP/ESP Control

[7,6] Output

0,0 Lowest Drive

0,1 ..

1,0 ..

1,1 Highest Drive

Output Drive

Control

D4

[1:0]

OCLK Control

[3:2]

ECLK Control

[5:4]

ORGB/OPOL Control

[7:6]

ERGB/EPOL Control

[A,B]

Output

0,0

Lowest Drive

0,1

..

1,0

..

1,1

Highest Drive

CD Size

D5

[7:0]

= # Data/CD

This number defines how many contiguous pixels are output on the odd and even data

channels for the single port CD interface. CD sizes of up to 128 pixel (384 channel) are

supported. A minimum value of 20H must be programmed regardless of CD interface

used.

Input Format

Control

D6

[0]

Fix Vertical

“0” = Vertical position dependent on first ENAB from VSYNC

“1” = Vertical position dependent on Vertical Backporch Register

[1]

Fix Horizontal

“0” = Horizontal position dependent on ENAB

“1” = Horizontal position dependent on Horizontal Backporch Register

*See

Table 1 for valid mode combinations.

[2]

Enab detection

“0” = Enab detection off

“1” = Enab detection on (detects if Enab is toggling)

Auto Mode switching when Enab detection = “1”

Fix

Vertical

Fix

Horizontal

Enab

Toggling

Operating Mode

0

0

Yes

ENAB ONLY

0

0

No

FV/FH

1

0

Yes

FV/ENAB HORIZ

1

0

No

FV/FH

1

1

X

FV/FH

Note: Input sync. need to be proceeded before RSTZ goes “high” to determine the “Operating

Mode”

www.national.com

11