HT82K96E datasheet(23/46 Pages) HOLTEK

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HT82K96E

Rev. 1.70

April 22, 2004

The definitions of the USB/PS2 status and control register (USC; 1AH) are as shown.

USC

Bits

R/W

Function

SUSP

Read only, USB suspend indication. When this bit is set to

²1² (set by SIE), it indi-

cates the USB bus enters suspend mode. The USB interrupt is also triggered on any

changing of this bit.

RMWK

USB remote wake up command. It is set by MCU to force the USB host leaving the

suspend mode. When this bit is set to

²1²,2ms delay for clearing this bit to ²0² is

needed to insure the RMWK command is accepted by SIE.

URST

R/W

USB reset indication. This bit is set/cleared by USB SIE. This bit is used to detect

which bus (PS2 or USB) is attached. When the URST is set to

²1², this indicates an

USB reset is occurred (The attached bus is USB) and an USB interrupt will be initial-

ized.

RESUME

USB resume indication. When the USB leaves suspend mode, this bit is set to

²1²

(set by SIE). This bit will appear 20ms waiting for MCU to detect. When the RE-

SUME is set by SIE, an interrupt will be generated to wake-up the MCU. In order to

detecting the suspend state, MCU should set USBCKEN and clear SUSP2 (in SCC

the SUSP is going

²0². When MCU is detecting the SUSP, the RESUME (causes

MCU to wake-up) should be remembered and token into consideration.

PS2DAI

Read only, USBD-/DATA input

PS2CKI

Read only, USBD+/CLK input

PS2DAO

Data for driving USBD-/DATA pin when work under 3D PS2 mouse function.

(Default=

²1²)

PS2CKO

Data for driving USBD+/CLK pin when work under 3D PS2 mouse function.

(Default=

²1²)

The USR (USB endpoint interrupt status register) register is used to indicate which endpoint is accessed and to select

serial bus (PS2 or USB) and A/D converter operation modes. The endpoint request flags (EP0IF, EP1IF, EP2IF and

EP3IF) are used to indicate which endpoints are accessed. If an endpoint is accessed, the related endpoint request

flag will be set to

²1² and the USB interrupt will occur (if USB interrupt is enabled and the stack is not full). When the ac-

tive endpoint request flag is served, the endpoint request flag has to be cleared to

²0².

USR

Bits

R/W

Function

EP0IF

R/W

When this bit is set to

²1² (set by SIE), it indicates the endpoint 0 is accessed and an

USB interrupt will occur. When the interrupt has been served, this bit should be

cleared by firmware.

EP1IF

R/W

When this bit is set to

²1² (set by SIE), it indicates the endpoint 1 is accessed and an

USB interrupt will occur. When the interrupt has been served, this bit should be

cleared by firmware.

EP2IF

R/W

When this bit is set to

²1² (set by SIE), it indicates the endpoint 2 is accessed and an

USB interrupt will occur. When the interrupt has been served, this bit should be

cleared by firmware.

EP3IF

R/W

When this bit is set to

²1² (set by SIE), it indicates the endpoint 3 is accessed and an

USB interrupt will occur. When the interrupt has been served, this bit should be

cleared by firmware.

SPS2

R/W The PS2 function is selected when this bit is set to

²1². (Default=²0²)

SUSB

R/W The USB function is selected when this bit is set to

²1². (Default=²0²)

ADREF

R/W

The reference voltage of A/D converter is coming from the VDD and VSS of MCU

when this bit is set

²1². Otherwise, the reference voltage of A/D converter comes

from external PB6/VRL and PB7/VRH pins. (Default=

²1²)

FIFO-cntl

For ICE only, 0 for FIFO read (Default=

²0²); 1 for FIFO write

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