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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M38B53M4-059FP датащи(PDF) 7 Page - Mitsubishi Electric Semiconductor |
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M38B53M4-059FP датащи(HTML) 7 Page - Mitsubishi Electric Semiconductor |
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7 / 69 page  MITSUBISHI MICROCOMPUTERS 38B5 Group SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 7 PRELIMINAR Y Notice: This is not a final specification. Some parametric limits are subject to change. FUNCTIONAL DESCRIPTION Central Processing Unit (CPU) The 38B5 group uses the standard 740 family instruction set. Refer to the table of 740 family addressing modes and machine instruc- tions or the 740 Family Software Manual for details on the instruction set. Machine-resident 740 Family instructions are as follows: •The FST and SLW instructions cannot be used. •The MUL, DIV, WIT and STP instructions can be used. Fig. 5 Structure of CPU Mode Register [CPU Mode Register] CPUM The CPU mode register contains the stack page selection bit and internal system clock control bits. The CPU mode register is allo- cated at address 003B16. CPU mode register (CPUM (CM) : address 003B16) b7 b0 Stack page selection bit 0 : 0 page 1 : 1 page Main clock (XIN-XOUT) stop bit 0 : oscillating 1 : stopped Main clock division ratio selection bit 0 : f(XIN) (high-speed mode) 1 : f(XIN)/4 (middle-speed mode) Internal system clock selection bit 0 : XIN–XOUT selection (middle-/high-speed mode) 1 : XCIN–XCOUT selection (low-speed mode) Processor mode bits b1 b0 0 0 : Single-chip mode 0 1 1 0 Not available 1 1 Port XC switch bit 0 : I/O port function (stop oscillating) 1 : XCIN-XCOUT oscillating function XCOUT drivability selection bit 0 : Low drive 1 : High drive |
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