PC87591L datasheet(117/437 Pages) NSC

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Embedded Controller Modules (Continued)

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Input Buffer

The input buffer characteristics are defined in Section 2.2 on page 41. The input buffer has an enable input. When enabled,

the buffer inputs the pin’s logic level to the on-chip modules. When disabled, the input is blocked to prevent supply leakage

currents.

Weak Pull-Up

The weak pull-up is enabled when the corresponding bit of PyWPU is set (1). This pull-up can prevent the input from being

in an undefined state.

Alternate Function

PyALT controls the use of each of the port pins for GPI or for the pin’s respective alternate function.

When a PxALT bit is cleared (0):

●

The corresponding pin is used as a GPI pin.

●

The input buffer is routed to the Data Input register.

In this case, the input buffer is blocked, except when the buffer is actually being read.

●

The pull-up is enabled when both the PyWPU is set and the output buffer is put in TRI-STATE.

When a bit in PxALT is set (1):

●

The corresponding pin is used for an alternate function (i.e., a signal to some other PC87591x module).

●

The input buffer is always enabled; therefore, to minimize current consumption, the signal should be held above VCC−0.2

or below GND+0.2V.)

●

The pull-up is enabled when both the PyWPU is set and the output buffer is put in TRI-STATE.

Data Input

The Data Input (PyDIN) register returns the current value/state of the pin. This register can always be read.

4.5.4

GPO Port Pz

Output Only Port with Alternate Function

The General-Purpose Output (GPO) port (Pz) is a subset of the GPIO functions. It enables the port to be used as a GPO

port or as an output signal for an alternate function. Figure 36 illustrates its functionality.

Output Buffer

The output buffer is a TRI-STATE buffer. The output type (i.e., CMOS or TTL) and its driving capabilities are described in

Section 2.2 on page 41.

Alternate Function

The PzALT controls the use of each of the port pins for GPO or for the pin’s respective alternate function.

When a PzALT bit is cleared (0):

●

The corresponding pin is used as a GPO pin.

●

The output buffer is controlled by the Data Output register.

When a bit in PzALT is set (1):

●

The corresponding pin is used for an alternate function (i.e., a signal from or to some other module of the PC87591x).

●

The output buffer data is controlled by signals coming from the alternate module.

Data Output

{

Alt Device

Alt

PzAlt

Alternate

Function

{

Data Out

(PzDOUT)

Alt

Figure 36. GPO Port Pz Schematic Diagram

Data Output

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