LP3971 datasheet(37/52 Pages) TI1

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PWR_ON

nTEST_JIG

SPARE

Internal Thermal Early Warning

10 ms

EXT_WAKEUP

PWR_ON

nTEST_JIG

SPARE

LP3971

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SNVS432V – JANUARY 2006 – REVISED MAY 2013

WAKE-UP FUNCTIONALITY (PWR_ON, nTEST_JIG, SPARE AND EXT_WAKEUP)

Three input pins can be used to assert wakeup output for 10 ms for application processor notification to wakeup.

SPARE Input can be programmed through I2C compatible interface to be active low or high (SPARE bit, Default

is active low ‘1’). A reason for wakeup event can be read through I2C compatible interface also. Additionally

wakeup inputs have 30 ms de-bounce filtering. Furthermore PWR_ON have distinguishing between short and

long (

∼1s) pulses (push button input). LP3971 also has an internal Thermal Shutdown early warning that

generates a wakeup to the system also. This is generated usually at 125°C.

WAKEUP register bits

Reason for WAKEUP

WUP0

SPARE

WUP1

TEST_JIG

WUP2

PWR_ON short pulse

WUP3

PWR_ON long pulse

TSD_EW

TSD Early Warning

INTERNAL THERMAL SHUTDOWN PROCEDURE

Thermal shutdown is build to generate early warning (typ. 125°C) which triggers the EXT_WAKEUP for the

processor acknowledge. When a thermal shutdown triggers (typ. 160°C) the PMU will reset the system until the

device cools down.

BATTERY SWITCH AND BACK UP BATTERY CHARGER

When Back-Up battery is connected but the main battery has been removed or its supply voltage too low,

LP3971 uses Back-Up Battery for generating LDO_RTC voltage. When Main Battery is available the battery fet

switches over to the main battery for LDO_RTC voltage. When Main battery voltage is too low or removed

nBATT_FLT is asserted. If no back up battery exists, the battery switch to back up can be switched off by

nBU_BAT_EN bit. User can set the battery fault determination voltage and battery charger current via I2C

compatible interface. Enabling of back up battery charger can be done via serial interface (nBAT_CHG_EN) or

external charger enable pin (nCHG_EN). Pin 29 is set as external charger enable input by default. A

SHUTBKUPBAT register bit can be used to avoid discharging back up battery during storage etc. By setting this

bit before removing main battery the back up battery connection will not draw any current and stays like this until

the bit is set to default or the system is reset.

GENERAL PURPOSE I/O FUNCTIONALITY (GPIO1 AND GPIO2)

LP3971 has 2 general purpose I/Os for system control. I2C compatible interface will be used for setting any of the

pins to input, output or hi-Z mode. Inputs value can be read via serial interface (GPI1,2 bits). The pin 29

functionality needs to be set to GPIO by serial interface register bit nEXTCHGEN. (GPIO/CHG)

Controls

Port Function

Reg

batmonchg

GPIO<1>

Nextchgen_sel

bucen

GPIO1

Gpin 1

Function

Input = 0

Enabled

Input = 1

Not Enabled

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