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ST7FLCD1 датащи(PDF) 89 Page - STMicroelectronics

номер детали ST7FLCD1
подробное описание детали  8-bit MCU for LCD Monitors with 60 KBytes Flash, 2 KBytes RAM, 2 DDC Ports and Infrared Controller
PDF  95 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7FLCD1 датащи(HTML) 89 Page - STMicroelectronics

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ST7FLCD1
Electrical Characteristics
Note:1. The minimum period tILIL should not be less than the number of cycle times it takes to execute the
interrupt service routine plus 21 cycles.
2. For the case of IOL = 8 mA, 8 mA output current if corresponding overdrive bit = 1 in MISCR register.
3. Output high level by means of external pull-up resistor.
tILIL
Interrupt Pulse Period
See Note 1
tCPU
tOXOV
Crystal Oscillator Start-up Time
50
ms
tDDR
Power-up rise time
VDD min.
1100
ms
Standard I/O Port Pins
VOL
Output Low Level Voltage
Port A[7:6,3:0], Port B[3:0], Push Pull
IOL = 2 mA and VDD = 5 V
0.4
V
VOL
Output Low Level Voltage Port C[1:0]
Open Drain
IOL = 4 mA and VDD = 5 V
0.4
V
VOL
Output Low Level Voltage
Port A[5:4] (See Note 2)
IOL = 8 mA and VDD = 5 V
IOL = 2 mA and VDD = 5 V
0.4
V
VOL
Output Low Level Voltage Port D[7:0]
Open Drain
IOL = 4 mA and VDD = 5 V
0.4
V
VOH
Output High Level Voltage
Port A[7:6,3:0], Port B[3:0], Push Pull
IOH = 2 mA
VDD-0.8
V
VOH
Output High Level Voltage
Port A[5:4]
IOH = 2 mA
IOH = 8 mA
VDD-0.8
V
VOH
Output High Level Voltage
Port C[1:0], Port D (See Note 3)
VDD
V
VIH
Input High Level Voltage Port A [7:0],
Port B [3:0], Port C [1:0], Port D[7:0],
RESET
Leading Edge
0.7 * VDD
VDD
V
VIL
Input Low Level Voltage Port A [7:0],
Port B [3:0], Port C [1:0], Port D[7:0],
RESET
Trailing Edge
VSS
0.2 * VDD
V
IIL
I/O Ports Hi-Z Leakage Current
Port A[7:0], Port B[3:0], Port C[1:0], Port D[7:0], RESET
10
µA
COUT
CIN
Capacitance: Ports (as Input or Output), RESET
12
8
pF
IRPU
Pull-up resistor current
VDD = 5V VIN = VSS T =
25°C
30
60
100
µA
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit



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