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DS26C32AME/883 датащи(PDF) 5 Page - National Semiconductor (TI) |
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DS26C32AME/883 датащи(HTML) 5 Page - National Semiconductor (TI) |
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5 / 11 page ![]() AC Test Circuit and Switching Time Waveforms (Continued) Note 7: Diagram shown for ENABLE low. Note 8: S1 and S2 of load circuit are closed except where shown. Note 9: Pulse generator for all pulses: Rate ≤ 1.0 MHz; ZO =50Ω;tr ≤ 15 ns; t f ≤ 6.0 ns. Truth Table ENABLE ENABLE Input Output LH X Z All Other Combinations of Enable Inputs V ID ≥ V TH (Max) H V ID ≤ V TH (Min) L Open H Z = TRI-STATE Typical Applications Two-Wire Balanced Systems, RS-422 00876409 00876407 FIGURE 5. Propagation Delay for “LS-Type” Load (Notes 7, 9) 00876408 FIGURE 6. Enable and Disable Times for “LS-Type” Load (Notes 8, 9) www.national.com 5 |
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