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FPD87392 датащи(PDF) 27 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали FPD87392
подробное описание детали  3.3V TFT-LCD Timing Controller with Dual LVDS Inputs/Dual RSDS??Outputs for TFT-LCD Monitor and Notebook (SXGA/SXGA/UXGA)
PDF  30 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

FPD87392 датащи(HTML) 27 Page - National Semiconductor (TI)

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Pin Description (Continued)
Control Input
Symbol
Pin No.
Type
Function
BIT_CFG1/2
37, 38
I
LVDS Input and RSDS Output Bit Selection
MODE[1:0]
122, 33
I
Graphic Mode Selection
“00”: SXGA, “01”: SXGA+, “10”: UXGA, “11”: Don’t Care
DMAP1/2
39, 40
I
RSDS Output Data Mapping
TPW
125
I
TP Duty Control (Default Low)
OEW1/2
126, 127
I
OE Duty Control (Default 2’b00)
TEST1/2
128, 1
I
Test Mode
Low: Normal Operation, High: Test Mode
PDI
32
I
LVDS Power Down (Active Low)
RSTB
34
I
System Reset (Active Low)
RxMap
120
I
RxMap=1(SS Mapping); RxMap=0, NS Mapping
NC
111, 116
No Connect
Power Supply
Symbol
Pin No.
Type
Function
V
DD
36, 42, 109,
117, 123
P
Digital Power for Logic Core and LVDS Deserializer
V
SS
35, 41, 112,
118, 124
G
Digital Ground for Logic Core and LVDS Deserializer
V
DDA
2, 16, 17,
31
P
Power for LVDS PLL and Analog Bandgap
V
SSA
3, 14, 15,
18, 29, 30
G
Ground for LVDS PLL and Analog Bandgap
V
DDIO
55, 75, 86,
106
P
Digital I/O Power and RSDS Outputs
V
SSIO
46, 64, 77,
97
G
Digital I/O Ground and RSDS Outputs
Bonding Option (B/O)
Symbol
Pin No.
Type
Function
SYNC
B/O
PU
SYNC Mode
High: Enable, Low: Disable
FRM
B/O
PU
Free Run Mode
High: Enable, Low: Disable
FDE
B/O
PU
Failure Detection
High: Enable, Low: Disable
POR
B/O
PU
Power-On-Reset
High: Enable, Low: Disable
Pin Types
I
-Input (3.3V TTL-Compatible)
TO
-TTL Output (3.3V TTL-Compatible)
LVDSI -Low Voltage Differential Signal Input
RSO
-Reduced Swing Differential Output
P
-Power
G
-Ground
PU
-Pull-Up
PD
-Pull-Down
www.national.com
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