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FPD87392 датащи(PDF) 20 Page - National Semiconductor (TI) |
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FPD87392 датащи(HTML) 20 Page - National Semiconductor (TI) |
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20 / 30 page ![]() Input Signal Timing Sync only mode, no DE inputted, is supported when the SYNC pin (Bonding Option pin) is enable high. Whenever DE signal is inputted, it works as DE mode. In the DE mode, H-blank min is considered with Failure detection mode enabled. In the defaults mode, T valid_H should be subtracted in the table below. Graphic Mode Sync Mode (Bonding Option) DE Mode Number of Total Horizontal Lines in a Frame Number of Total Pixel Clocks in a Horizontal Line H-Timing (clocks) V-Timing (lines) H-Timing (clocks) V-Timing (lines) From Sync to Data Total H-Timing From Sync to Data Total V-Timing H-Blank H-Blank Detection Typ Min Max Typ Min Max Min Min Typ Typ SXGA 248 1430 2047 38 1066 2047 150 2 1066 1688 SXGA+ 128 1550 2047 12 1066 2047 150 2 1066 1688 UXGA 304 1804 4095 46 1250 2047 204 2 1250 2160 Note: H = Lines Supports VESA Standard in SYNC Mode (B/O SYNC Pin = High) SXGA SXGA+ UXGA Unit Horizontal WIDTH 1280 1400 1600 clock HFP 48 48 64 clock HSW 112 112 192 clock HBP 248 128 304 clock Vertical HEIGHT 1024 1050 1200 Line VFP 1 1 1 Line VSW 3 3 3 Line VBP 38 12 46 Line 20104317 FIGURE 17. Video Signal Format www.national.com 20 |
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