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WM8998 датащи(PDF) 13 Page - Wolfson Microelectronics plc |
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WM8998 датащи(HTML) 13 Page - Wolfson Microelectronics plc |
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13 / 307 page ![]() Production Data WM8998 w PD, October 2014, Rev 4.0 13 RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN TYP MAX UNIT Digital supply range (Core) See notes 2, 3, 4, 5 DCVDD (≤24.576MHz clocking) 1.14 1.2 1.9 V DCVDD (>24.576MHz clocking) 1.71 1.8 1.9 Digital supply range (I/O) DBVDD1 1.7 1.9 V Digital supply range (I/O) DBVDD2, DBVDD3 1.7 3.47 V LDO supply range LDOVDD 1.7 1.8 1.9 V Charge Pump supply range CPVDD 1.7 1.8 1.9 V Speaker supply range SPKVDDL, SPKVDDR 2.4 5.5 V Analogue supply range See note 2 AVDD 1.7 1.8 1.9 V Ground See note 1 DGND, AGND, CPGND, SPKGNDL, SPKGNDR 0 V Power supply rise time See notes 7, 8, 9, 10 DCVDD 10 2000 µs All other supplies 1 Operating temperature range TA -40 85 °C Notes: 1. The grounds must always be within 0.3V of AGND. 2. AVDD must be supplied before DCVDD. DCVDD must not be powered if AVDD is not present. There are no other power sequencing requirements. 3. An internal LDO (powered by LDOVDD) can be used to provide the DCVDD supply. 4. ‘Sleep’ mode is supported when DCVDD is below the limits noted, provided AVDD and DBVDD1 are present. 5. Under default conditions, digital core clocking rates above 24.576MHz are inhibited. The register-controlled clocking limit should only be raised when the applicable DCVDD voltage is present. 6. An internal Charge Pump and LDO (powered by CPVDD) provide the microphone bias supply; the MICVDD pin should not be connected to an external supply. 7. DCVDD minimum rise time does not apply when this is powered using the internal LDO. 8. If DCVDD is supplied externally, and the rise time exceeds 2ms, then RESET ¯¯¯¯¯¯ must be asserted (low) during the rise, and held asserted until after DCVDD is within the recommended operating limits. 9. The specified minimum power supply rise times assume a minimum decoupling capacitance of 100nF per pin. However, Wolfson strongly advises that the recommended decoupling capacitors are present on the PCB and that appropriate layout guidelines are observed. 10. The specified minimum power supply rise times also assume a maximum PCB inductance of 10nH between decoupling capacitor and pin. |
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