WM5102 datasheet(85/334 Pages) WOLFSON

85 / 334 page

Production Data

WM5102

PD, June 2014, Rev 4.2

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

LHPF4_ENA

Low/High Pass Filter 4 Enable

0 = Disabled

1 = Enabled

R3789

(0ECDh)

HPLPF4_

15:0

LHPF4_COEFF

[15:0]

0000h

Low/High Pass Filter 4 Frequency

Coefficient

Refer to WISCE evaluation board control

software for the derivation of this field

value.

Table 15 Low Pass Filter / High Pass Filter Control

The WM5102 performs automatic checks to confirm that the SYSCLK frequency is high enough to

support the commanded LHPF and digital mixing functions. If an attempt is made to enable an LHPF

signal path, and there are insufficient SYSCLK cycles to support it, then the attempt will be

unsuccessful. (Note that any signal paths that are already active will not be affected under these

circumstances.)

The Underclocked Error can be monitored using the GPIO and/or Interrupt functions. See “General

Purpose Input / Output” and “Interrupts” for further details.

The FX_STS field in Register R3585 indicates the status of each of the EQ, DRC and LHPF signal

paths. If an Underclocked Error condition occurs, then this register provides readback of which EQ,

DRC or LHPF signal path(s) have been successfully enabled.

The status bits in Registers R1600 to R2920 indicate the status of each of the digital mixers. If an

Underclocked Error condition occurs, then these bits provide readback of which mixer(s) have been

successfully enabled.

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