RT9451

27

DS9451-00

September 2013

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Interrupt MASK Register 3 (MASK3)

Address - 0x0Dh

Data Bit

D7

D6

D5

D4

D3

D2

D1

D0

Field Name

BSTVINOVM

BSTOLM

BSTLOWVM

BSTBATOVM

BST32SM

Not

used

Not

used

Not

used

Read/Write

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset

Value

0

0

0

0

0

0

0

0

Field Name

Bit Definition

(1)

BSTVINOVM

Boost VIN over voltage interrupt mask

0 – Interrupt not masked

1 – Interrupt masked

BSTOLM

Boost over load interrupt mask

0 – Interrupt not masked

1 – Interrupt masked

BSTLOWVM

Boost low battery voltage interrupt mask

0 – Interrupt not masked

1 – Interrupt masked

BSTBATOVM

Boost battery over voltage interrupt mask

0 – Interrupt not masked

1 – Interrupt masked

BST32SM

Boost 32s time out interrupt mask

0 – Interrupt not masked

1 – Interrupt masked

Not used

N/A

Not used

N/A

Not used

N/A

(1) Setting any of the interrupt mask bits does not disable protection circuits. When set, the respective fault will not be

signaled on the INT pin.

CHIP ID Register (CHIPID)

Address - 0x0Eh

Data Bit

D7

D6

D5

D4

D3

D2

D1

D0

Field Name

VENDOR_ID [3:0]

CHIP_REV [3:0]

Read/Write

R

R

R

R

R

R

R

R

Reset Value

0

0

0

0

0

0

0

1