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RT9451 датащи(PDF) 15 Page - Richtek Technology Corporation |
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RT9451 датащи(HTML) 15 Page - Richtek Technology Corporation |
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15 / 37 page ![]() RT9451 15 DS9451-00 September 2013 www.richtek.com © Copyright 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Application Information The RT9451 is an integrated solution of single-cell Li-ion and Li-polymer battery charger for portable applications. The part integrates a synchronous PWM controller with power MOSFETs to provide MIVR (Minimum Input Voltage Regulation), input current sensing, high accuracy current and voltage regulation, and charge termination in a small package for space limited devices. The part also features USB OTG(On-The-Go) function and USB charger detection (DPDM detection) function. The RT9451 provides three operation modes : charge mode, boost mode (USB OTG), and high impedance mode. In charge mode, the RT9451 supports a precision charging system for single cell. In boost mode, the RT9451 works as a Boost converter and boosts the voltage from battery to VIN pin for sourcing the OTG devices. In high impedance mode, the RT9451 stops charging or boosting and operates in a mode with low quiescent current from VIN or battery to reduce the power consumption when the portable device is in standby mode. In charge mode, the RT9451 integrates USB charger detection for input current limit of 500mA and 1A. The detection is automatically triggered after each POR. The detection result can be ignored by the host via I2C interface. The slave address for the RT9451 is “1001010”. I2C Interface Timing Diagram The RT9451 acts as an I2C -bus slave. The I2C-bus master configures the settings for charge mode and boost mode by sending command bytes to the RT9451 via the 2-wire I2C-bus. After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an eighth bit which is a data direction bit (R/W). The second byte selects the register to which the data will be written. The third byte contains data to the selected register. S = Start Condition W = Write (SDA = “0”) R = Read (SDA = “1”) ACK = Acknowledge P = Stop Condition B7 123 4 56 7891 2 B6 B2 B1 B0 34 567 8 91 2345 678 9 C5 C4 C3 C2 C1 C0 W ACK ACK S P 0B4 ACK SCL SDA A0 A1 A2 A3 A4 A5 A6 B5 C7 C6 B3 Start 1 0 0 1 0 1 0 R/W B7 B6 B5 B4 B3 B2 B1 B0 C7 C6 C5 C4 C3 C2 C1 C0 Stop The 2nd Byte (Data Address, Data) The 3rd Byte (Data) The 1st Byte (Slave Address, R/W) |
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