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RV-3049 датащи(PDF) 12 Page - MICORO CRYSTAL SWITZERLAND

номер детали RV-3049
подробное описание детали  DTCXO Temperature Compensated Real Time Clock
PDF  65 Pages
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производитель  MICROCRYSTAL [MICORO CRYSTAL SWITZERLAND]
домашняя страница  http://www.microcrystal.com
Logo MICROCRYSTAL - MICORO CRYSTAL SWITZERLAND

RV-3049 датащи(HTML) 12 Page - MICORO CRYSTAL SWITZERLAND

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Micro Crystal
DTCXO Temperature Compensated Real Time Clock / Calendar Module
RV-3049
12/65
3.2.3.CONTROL_INT FLAG (address 02h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
02h
Control_INT Flag
X
X
X
SRF
V2IF
V1IF
TF
AF
Bit
Symbol
Value
Description
Reference
7 to 5
unused
X
Unused
4
SRF
0
No Self-Recovery Interrupt generated
See section 4.6.
1
Self-Recovery Interrupt generated if possible
deadlock is detected; clear flag to clear Interrupt
3
V2IF
0
No VLOW2 Interrupt generated
See section 4.6.
1
VLOW2 Interrupt generated when supply voltage
drops below VLOW2 threshold
2
V1IF
0
No VLOW1 Interrupt generated
See section 4.6.
1
VLOW1 Interrupt generated when supply voltage
drops below VLOW1 threshold
1
TF
0
No Timer Interrupt generated
See section 4.6.
1
Timer Interrupt generated when Countdown Timer
value reaches zero
0
AF
0
No Alarm Interrupt generated
See section 4.6.
1
Alarm Interrupt generated when Time & Date
matches Alarm setting
Bit positions labelled as “
X” are not implemented and will return a “0” when read.
3.2.4.CONTROL_STATUS (address 03h…bits description)
Address
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
03h
Control_Status
EEbusy
X
PON
SR
V2F
V1F
X
X
Bit
Symbol
Value
Description
Reference
7
EEbusy
0
EEPROM is not busy
See section 4.3.
1
Flag is set when EEPROM page is busy due to
“write” or automatic EEPROM refresh in progress
6
unused
X
Unused
5
PON
0
No Power-On Reset executed
See section 4.1.
1
Flag is set at Power-On, flag must be cleared by
writing “0”
4
SR
0
No Self-Recovery Reset or System Reset has
been generated.
See section 4.2.1.
1
Flag is set when Self-Recovery Reset or System
Reset has been generated.
3
V2F
0
No VLOW2 Interrupt generated”
See section 4.6.
1
VLOW2 Interrupt generated when supply voltage
drops below VLOW2 threshold
2
V1F
0
No VLOW1 Interrupt generated”
See section 4.6.
1
VLOW1 Interrupt generated when supply voltage
drops below VLOW1 threshold
1 to 0
unused
X
Unused
Bit positions labelled as “
X” are not implemented and will return a “0” when read.



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