MB91F528 datasheet(7/241 Pages) SPANSION

7 / 241 page

D a t a S h e e t

MB91F528_DS705-00016-1v0-E, March 28, 2014

CONFIDENTIAL

< I

2C >

 10 channels (ch.3, ch.4, ch.12 to ch.19) Standard mode / High-speed mode supported

 5 channels (ch.5 to ch.8, ch.11) Standard mode supported

 Full-duplex double buffering system, 64-byte transmission FIFO memory, 64-byte reception FIFO

memory

 Standard mode (Max. 100kbps) / High-speed mode (Max. 400kbps) supported

 DMA transfer supported (for transmission only)

 CAN : 6 channels

 Transfer speed : Up to 1Mbps

 128-transmission/reception message buffering : 6 channels

 FlexRay controller: 1 unit (ch.A/ch.B)

FlexRay specification version 2.1 supported

Max. 128-message buffer configuration

8KB message RAM

Variable-length message buffer configuration

Each message buffer can be configured as a part of a reception buffer, transmission buffer, or

reception FIFO.

Host access to message buffers through input and output buffers

Filtering the slot counter, cycle counter, and channels

Maskable interrupts

 PPG : 16-bit × Max. 88 channels

 LED drive output 4 channels (ch.11 to ch.14)

 Reload timer : 16-bit × 8 channels

 Free-run timer :

16-bit × 3 channels

32-bit × Max. 8 channels

 Input capture :

16-bit × 4 channels (linked to the free-run timer)

32-bit × Max. 8 channels (linked to the free-run timer)

 Output compare :

16-bit × 6 channels (linked to the free-run timer)

32-bit × Max. 8 channels (linked to the free-run timer)

 Wave generator : 6 channels

 U/D counter:

 8/16-bit up/down counter × Max. 4 channels

 Real-time clock (RTC) (for day, hours, minutes, seconds)

 Main oscillation / sub oscillation frequency can be selected for the operation clock.

 Calibration: A real-time clock (RTC) of the sub clock drive.

 The main clock to sub clock ratio can be corrected by setting the real-time clock prescaler

 Clock Supervisor

 Monitoring abnormality (damage of crystal etc.) of sub oscillation (32kHz) (dual clock products)

and main oscillation (4 MHz).

 When abnormality is detected, it switches to the CR clock.

For some devices, ON/OFF can be selected as the initial value.

 Base timer : 2 channels

 16-bit timer

 The timer mode is selected from PWM/PPG/PWC/reload.

 In the cascaded mode, a pair of 16-bit timers can be used as one 32-bit timer.

 CRC generation

 Watchdog timer

 Hardware watchdog

 Software watchdog (An effective range of a clear counter can be set.)

 NMI

 Interrupt controller

 Interrupt request batch read

 Multiple interrupts from peripherals can be read by a series of registers.

 I/O relocation

 Peripheral function pins can be reassigned.

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