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LP3910 датащи(PDF) 53 Page - Texas Instruments |
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LP3910 датащи(HTML) 53 Page - Texas Instruments |
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53 / 72 page ![]() LP3910 www.ti.com SNVS481M – NOVEMBER 2006 – REVISED DECEMBER 2015 8.6 Register Maps 8.6.1 LDO1 Control Register LDO1 can be configured through its own I2C control register. The output voltage is programmable in steps of 100 mV from 1.2 V to 3.3 V. LDO1 gets enabled during the power-on sequence. Disable/enable control is provided through bit D5 in the LDO1 control register after selecting the appropriate D4–0 settings, which determine the output voltage. The output voltage can be altered while LDO1 is enabled. When LDO1 is disabled, it shunts the output to AGND with a RSHUNT = 200 Ω (maximum). 8.6.2 BATTLOW Register (04)H Battery Low Alarm Register D7–5 D4–0 Access Read Only 0 R/W Data Reserved Battery low threshold voltage (V) Battery low IRQ threshold voltage (V) 5’h14–1F 2.50 2.70 5’h13 2.55 2.75 5’h12 2.60 2.80 5’h11 2.65 2.85 5’h10 2.70 2.90 5’h0F 2.75 2.95 5’h0E 2.80 3.00 5’h0D 2.85 3.05 5'h0C 2.90 3.10 5’h0B 2.95 3.15 5’h0A 3.00 3.20 5’h09 3.05 3.25 5’h08 3.10 3.30 5’h07 3.15 3.35 5’h06 3.20 3.40 5’h05 3.25 3.45 5’h04 3.30 3.50 5’h03 3.35 3.55 5’h02 3.40 3.60 5’h01 3.45 3.65 5’h00 3.50 3.70 Reset 5’h0C 2.90 3.10 Standard 5’h1F 2.70 2.70 n/a Default “AP” Default Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback 53 Product Folder Links: LP3910 |
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