Silicon Image, Inc.

Silicon Image, Inc.

17

Subject to Change without Notice

PCB Thermal Design Options:

The SiI161A is packaged in a thermally enhanced 100 pin TQFP with an exposed metal pad (7.5mm x 7.5 mm) on

the package designed for improved thermal dissipation. To improve the heat removal from the package, the exposed

thermal pad may be soldered to a thermal landing area on the PCB, as described in the following section, entitled

“Implementation Guidelines for Thermal Land Design”.

Implementation of the thermal landing area on the PCB can, in some cases, make trace routing and board design

complicated. In some applications, it may be desirable to eliminate the thermal landing area on the PCB.

Generally the thermal performance of a package can be represented by the following parameter (JEDEC standard

JESD 51-2, 51-6):

θ

θ

θ

capability. Lower

θ

Implementation of the thermal landing area, combined with complete soldering of the package to the landing area

results in a

θ

°C/W. If the SiI161A package is assembled to a standard PCB, without the thermal landing

area, the

θ

°C/W. For comparison, the non-thermally enhanced 100 pin TQFP package has a θ

53

°C/W, so the advantage of the exposed metal pad in the thermally enhanced SiI161A package is significant, even

without a landing area on the PCB.

In order to determine the requirements for soldering the SiI161A to the PCB, the following analysis is insightful.

Assuming a worst case scenario, with operation at the maximum ambient temperature of 70

°C, at maximum voltage

(3.6V) and worst case pattern (330 mA) – the junction temperature would be 35

°C above ambient, or 105°C. This is

still well below the maximum junction temperature of 125

°C, providing suitable margin even without requiring the use

of solder and a specific landing area on the PCB. For comparison, with the improved thermal dissipation that results

from complete soldering of the thermal pad on the chip to a thermal landing area on the PCB, the package

temperature would be 23

°C above ambient – or roughly 12°C cooler than a chip with no solder.

Based on this analysis, the need for designing a thermal landing area on a PCB for use with the SiI161A receiver

should be considered an optional design choice by the customer, and is not an absolute requirement.

For more information regarding Thermal Design Options, please see Application Note SiI-AN-0045, Enhanced

Thermal Packaging Options for SiI-161A.