4

36-00-01-00

5

Ver. 1.0.0

Aeroflex Microelectronics Solutions - HiRel

Note:

1. Reference application note AN-MEM-004 for additional READY signal information.

2. DC inputs are established at power up and cannot be switched while power is applied to the device.

3. Reference application note AN-MEM-005 for JTAG operations. JTAG operations are intended for terrestrial use and not guaranteed in radiation environment.

NAME

DESCRIPTION

TYPE

ZZ

ZZ “Sleep” Input, Active HIGH: When HIGH, places the device in a non-

time critical “sleep” condition with data integrity preserved. During normal

operation, this pin must be LOW.

Input-Synchronous

SHUTDOWN

Shutdown Input, Active HIGH: When HIGH, places device in shutdown

mode. System clock can be stopped. Memory contents are not retained.

Input-Asynchronous

Device Ready Output: READY outputs a HIGH when device is available

for normal operations. READY outputs a LOW when requesting an idle

cycle or during power up initialization.

Output-Synchronous

Mode Input: Established at power up. Selects the burst order of the device.

When tied to VSS selects linear burst sequence. When tied to VDDQ selects

interleaved burst sequence.

Input-DC

Input Current Reference: Provided for external precision current reference

resistor connection.

Input-DC

Power supply inputs to the core of the device.

Power Supply

Power supply for the I/O circuitry.

I/O Power Supply

Ground inputs to the core of the device.

Ground

Ground for I/O circuitry.

I/O Ground

NUIL

Not used Input Low: Pins designated as NUIL need to be externally

--

NUIH

Not used Input High: Pins designated as NUIH need to be externally

--

NC

No Connects. Not internally connected to the die.

---

JTAG Circuit Serial Data Output: Package pin requires a pull-up through

JTAG Serial Output

Synchronous

JTAG Circuit Serial Data Input: Device pin internally connected through

JTAG Serial Input

Synchronous

JTAG Controller Test Mode Select: Device pin internally connected

Test Mode Select

Synchronous

JTAG Circuit Clock Input: Package pin requires a pull-up through

JTAG Clock

Table 1: Pin Definitions