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VX6854LC датащи(PDF) 67 Page - STMicroelectronics |
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VX6854LC датащи(HTML) 67 Page - STMicroelectronics |
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67 / 114 page ![]() DocID027110 Rev 2 67/114 VX6854LC Video timing 69 6.4 Image compression The objective of the image compression is to reduce the required bandwidth in transmission between the sensor and the host. The key features of the DPCM/PCM compression algorithm are: • visually lossless • low cost implementation (no line memories are required) • fixed rate compression The 10-bit to 8-bit DPCM/PCM image compression algorithm is supported by VX6854LC. 10-bit to 8-bit compression has the additional advantage that one pixel value equals 1 byte of data. The level of compression is controlled via the CSI_data_format register. The same register is also used to enable and disable compression. The compression_mode register is used to select which compression algorithm is used. Currently only the DPCM/PCM technique is supported. Therefore the value of this register is always 0x01. The compression_capability register tells the host whether a sensor module does or does not have compression and if it has compression then what is the compression technique. Again currently only the DPCM/PCM technique is supported. Please also refer to section 10 of the SMIA1.0 specification document. 6.5 Exposure and gain control VX6854LC does not contain any form of automatic exposure control. To produce a correctly exposed image the integration period and analogue gain for the pixels must be calculated by an exposure control algorithm implemented externally. The parameters are written to the VX6854LC using the CCI interface. The exposure control parameters available on VX6854LC are: • fine integration time • coarse integration time • analogue gain • digital gain The exposure control parameter registers are defined in Chapter 4: Register map on page 29. Integration time and analogue gain capability registers should be used to determine the exposure control parameter limits for a given video timing configuration. See Section 6.7 of the SMIA 1.0 part 1 specification for more information on how to interpret the integration and gain capability registers and how to calculate exposure and gain limits. 6.5.1 Analogue gain model VX6854LC only supports the single global analogue gain mode. VX6854LC has a 16-bit register (0x0204 and 0x0205) to control analogue gain. However, only 4 bits are supported by the SMIA1.0 description. Two extra bits can be used for fine gain between values 8 and 16 but their description is not currently supported by SMIA1.0 specification. |
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