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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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L9779WD датащи(PDF) 121 Page - STMicroelectronics |
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L9779WD датащи(HTML) 121 Page - STMicroelectronics |
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121 / 170 page  DocID027452 Rev 5 121/170 L9779WD Functional description 169 6.17.4 Watchdog related MSC registers MSC registers REQULO, REQUHI, RST_AB1_CNT, RESPTIME are defined as here below: WDA is configured via MSC by writing MSC_RESPTIME register (WR_RESPTIME command), which is read by RD_DATA7 in upstream. WDA_RESPTIME is a read_only register, which is written by MSC_RESPTIME, that is to allow proper internal re-synchronization. MSC_RESPTIME bits 5 down through to 0 are automatically replicated into WDA_RESPTIME bit 5 down through to 0 respectively with less than 200 ns latency. This register is read by RD_DATA8 in upstream. MSC_RESPTIME (upstream data block 7, read command: RD_DATA7) MSC_RESPTIME MSC RESPONSE TIME Address: - Type: RW Reset: 0000 0000b (reset source: Bit 7-0: RST, RST_PRL) 7 6 5 43210 INIT_WDR CAN_TDI RESPTIME5 RESPTIME4 RESPTIME3 RESPTIME2 RESPTIME1 RESPTIME0 RW [7] INIT_WDR: ‚1': monitoring module reset enabled ‚0': monitoring module reset disabled locked by command LOCK [6] CAN_TDI: '1': disable transmission if WDA_INT active locked by command LOCK [5-0] RESPTIME (5-0): Response-time = (1+ 101*RESPTIME(5-0)) * 1/f_clk with f_clk = 64 kHz if CONFIG6 bit 1 is High, else f_clk=39kHz The error counter is incremented by one on a controller write access to this register! not locked by command LOCK <RESPTIME(5..0)> may be written by the command WR_RESPTIME |
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