HD3SS214

SLAS907 – DECEMBER 2015

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Figure 7. Combined AUX/DDC Circuitry

In this circuit, the unified AUX/DDC lines are split into two branches prior to entering the HD3SS214. One branch

is AC coupled and is connected to the AUX inputs of the HD3SS214. The other is connected to the DDC inputs.

AUX_SEL is configured so that the HD3SS214 transmits both of these through the switch. A conditional pull-up

resistor system is connected to the DDC branch of the line. This resistor system will enable the pull-up resistors

on the line only when HDMI/DVI signals are being transmitted, that is, when AUX is transmitting DDC signals.

This prevents the AUX signal from being interfered with during standard DP mode and enables I2C DDC

signaling during HDMI/DVI mode

The control input for the conditional pull-up circuit is the Cable Adaptor Detect (CAD) signal. When an HDMI or

DVI sink is being used, this signal goes high, which indicates that the AUX line must transmit the DDC signal.

When a standard DP sink is being used, the CAD signal goes low, indicating that the AUX line is transmitting its

normal AUX signal. In this way, the CAD signal indicates when the AUX/DDC lines need pull-up resistors and

when they do not.

The conditional pull-up circuit consists of an inverter, a p-type MOSFET, and two pull-up resistors. The FET acts

as a switch between the pull-up resistors. When CAD is high (indicating that pull-up resistors are needed), the

inverter outputs a low signal, which brings the Vgs of the FET below the FET’s threshold voltage. Pulling Vgs

below the threshold voltage turns the p-type FET on. When the FET turns on, it connects the AUX line’s pull-up

resistors to VCC, which enables them.

The chosen inverter is a Texas Instruments SN74AHC1G04 inverter, which has very fast response times and

(SLVS080). This device has a convenient dual transistor package, an ideal threshold voltage and very low drain-

to-source resistance when on. Together, these two devices have a desirable noise margin of 0.9 V.

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